%#################################################################
Title:        Cref Error Report
Design:       ehl_mcl
Date:         May 30 20:12:18 2019
%#################################################################



Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i1@ehl_mcl_lib.power_sequence(sch_1):Page1
Signal   PMC_DSW_PWROK at (A 7) is labeled only once in the design.
Signal    H_THRMTRIP_N at (B 7) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i1@ehl_mcl_lib.power_sequence(sch_1):Page2
Signal   PMC_SLP_SUS_N at (C 8) is labeled only once in the design.
Signal VCCST_CPU_5V_DS3_SENSE at (B 7) is labeled only once in the design.
Signal  V1.8A_VR_PWRGD at (C 8) is labeled only once in the design.
Signal        GP_DSW02 at (A 6) is labeled only once in the design.
Signal GP_DSW03_PMC_PWRBTN_N at (A 6) is labeled only once in the design.
Signal  VCCIO_VR_PWRGD at (B 7) is labeled only once in the design.
Signal      PS_ON_SW_N at (B 7) is labeled only once in the design.
Signal     NC_BATLOW_N at (B 7) is labeled only once in the design.
Signal V5A_V3.3A_VR_PWRGD at (D 8) is labeled only once in the design.
Signal VCCIN_AUX_VR_PWRGD at (D 8) is labeled only once in the design.
Signal  PCH_PG_SLG_OUT at (B 4) is labeled only once in the design.
Signal  SYS_PG_SLG_OUT at (B 4) is labeled only once in the design.
Signal ALL_SYS_PG_SLG_OUT at (B 4) is labeled only once in the design.
Signal VCCST_PG_SLG_OUT at (B 4) is labeled only once in the design.
Signal RSMRST_PG_SLG_OUT at (B 4) is labeled only once in the design.
Signal  DPWROK_SLG_OUT at (B 4) is labeled only once in the design.
Signal  +VDD_SILEGO_PS at (B 5) is labeled only once in the design.
Signal SILEGO_V3P3A_ENA at (B 2) is labeled only once in the design.
Signal GP_B13_PMC_PLTRST_N at (A 4) is labeled only once in the design.
Signal      CPUPWRGD_R at (A 4) is labeled only once in the design.
Signal  IMVP9_VR_READY at (A 4) is labeled only once in the design.
Signal VDDQ_TX_VR_PWRGD at (C 4) is labeled only once in the design.
Signal   VDD2_VR_PWRGD at (C 4) is labeled only once in the design.
Signal   ALL_SYS_PWRGD at (B 2) is labeled only once in the design.
Signal    VPP_VR_PWRGD at (D 4) is labeled only once in the design.
Signal GP_DSW04_PMC_SLP_S3_N at (D 3) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i10@ehl_mcl_lib.clock(sch_1):Page1
Signal          RTC_X1 at (A 5) is labeled only once in the design.
Signal        XTAL_OUT at (A 5) is labeled only once in the design.
Signal XTAL_PCH_38P4M_OUT_R at (A 3) is labeled only once in the design.
Signal XTAL_PCH_38P4M_IN_R at (B 3) is labeled only once in the design.
Signal         XTAL_IN at (B 5) is labeled only once in the design.
Signal          RTC_X2 at (A 5) is labeled only once in the design.
Signal      RTC_TEST_N at (C 5) is labeled only once in the design.
Signal       RTC_RST_N at (C 5) is labeled only once in the design.
Signal      INTRUDER_N at (D 5) is labeled only once in the design.
Signal XTAL_RTC_32K_IN_R at (A 8) is labeled only once in the design.
Signal XTAL_RTC_32K_OUT_R at (A 8) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i11@ehl_mcl_lib.ram(sch_1):Page1
Signal     ODT_B_CHA_0 at (B 7) is labeled only once in the design.
Signal      M_A_DQ_3_0 at (B 4) is labeled only once in the design.
Signal      M_A_DQ_3_4 at (B 4) is labeled only once in the design.
Signal      M_A_DQ_3_3 at (B 4) is labeled only once in the design.
Signal      M_A_DQ_0_3 at (C 4) is labeled only once in the design.
Signal    M_A_DQS_3_DN at (B 4) is labeled only once in the design.
Signal    M_A_DQS_0_DP at (B 4) is labeled only once in the design.
Signal    M_A_DQS_0_DN at (B 4) is labeled only once in the design.
Signal    M_A_DQS_3_DP at (B 4) is labeled only once in the design.
Signal      M_A_DQ_0_5 at (B 4) is labeled only once in the design.
Signal      M_A_DQ_0_1 at (B 4) is labeled only once in the design.
Signal      M_A_DQ_0_0 at (B 4) is labeled only once in the design.
Signal      M_A_DQ_0_2 at (B 4) is labeled only once in the design.
Signal      M_A_DQ_0_7 at (B 4) is labeled only once in the design.
Signal      M_A_DQ_3_2 at (B 4) is labeled only once in the design.
Signal      M_A_DQ_3_6 at (B 4) is labeled only once in the design.
Signal      M_A_DQ_0_4 at (B 4) is labeled only once in the design.
Signal      M_A_DQ_3_5 at (B 4) is labeled only once in the design.
Signal      M_A_DQ_3_7 at (B 4) is labeled only once in the design.
Signal      M_A_DQ_3_1 at (B 4) is labeled only once in the design.
Signal      M_A_DQ_0_6 at (B 4) is labeled only once in the design.
Signal       ZQ0_CHA_0 at (D 7) is labeled only once in the design.
Signal     ODT_A_CHA_0 at (C 7) is labeled only once in the design.
Signal       ZQ1_CHA_0 at (D 7) is labeled only once in the design.
Signal      M_A_DQ_1_4 at (C 4) is labeled only once in the design.
Signal      M_A_DQ_1_2 at (C 4) is labeled only once in the design.
Signal      M_A_DQ_2_4 at (C 4) is labeled only once in the design.
Signal      M_A_DQ_2_3 at (D 4) is labeled only once in the design.
Signal      M_A_DQ_1_7 at (C 4) is labeled only once in the design.
Signal      M_A_DQ_1_3 at (C 4) is labeled only once in the design.
Signal    M_A_DQS_1_DP at (C 4) is labeled only once in the design.
Signal      M_A_DQ_1_6 at (C 4) is labeled only once in the design.
Signal      M_A_DQ_1_0 at (C 4) is labeled only once in the design.
Signal      M_A_DQ_1_1 at (C 4) is labeled only once in the design.
Signal      M_A_DQ_2_1 at (D 4) is labeled only once in the design.
Signal      M_A_DQ_2_0 at (D 4) is labeled only once in the design.
Signal      M_A_DQ_1_5 at (C 4) is labeled only once in the design.
Signal    M_A_DQS_2_DN at (C 4) is labeled only once in the design.
Signal    M_A_DQS_2_DP at (C 4) is labeled only once in the design.
Signal      M_A_DQ_2_5 at (D 4) is labeled only once in the design.
Signal      M_A_DQ_2_7 at (D 4) is labeled only once in the design.
Signal      M_A_DQ_2_6 at (D 4) is labeled only once in the design.
Signal      M_A_DQ_2_2 at (C 4) is labeled only once in the design.
Signal    M_A_DQS_1_DN at (C 4) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i11@ehl_mcl_lib.ram(sch_1):Page2
Signal      M_B_DQ_3_1 at (B 4) is labeled only once in the design.
Signal      M_B_DQ_3_7 at (B 4) is labeled only once in the design.
Signal      M_B_DQ_2_7 at (C 4) is labeled only once in the design.
Signal      M_B_DQ_2_6 at (C 4) is labeled only once in the design.
Signal      M_B_DQ_2_1 at (D 4) is labeled only once in the design.
Signal    M_B_DQS_1_DP at (C 4) is labeled only once in the design.
Signal      M_B_DQ_2_3 at (D 4) is labeled only once in the design.
Signal      M_B_DQ_2_5 at (C 4) is labeled only once in the design.
Signal      M_B_DQ_2_0 at (D 4) is labeled only once in the design.
Signal      M_B_DQ_2_4 at (D 4) is labeled only once in the design.
Signal      M_B_DQ_2_2 at (D 4) is labeled only once in the design.
Signal      M_B_DQ_0_1 at (B 4) is labeled only once in the design.
Signal      M_B_DQ_0_4 at (B 4) is labeled only once in the design.
Signal      M_B_DQ_0_0 at (B 4) is labeled only once in the design.
Signal      M_B_DQ_3_3 at (B 4) is labeled only once in the design.
Signal      M_B_DQ_3_5 at (B 4) is labeled only once in the design.
Signal      M_B_DQ_3_6 at (B 4) is labeled only once in the design.
Signal    M_B_DQS_0_DN at (B 4) is labeled only once in the design.
Signal      M_B_DQ_0_5 at (B 4) is labeled only once in the design.
Signal      M_B_DQ_0_2 at (B 4) is labeled only once in the design.
Signal      M_B_DQ_0_6 at (B 4) is labeled only once in the design.
Signal      M_B_DQ_3_4 at (B 4) is labeled only once in the design.
Signal    M_B_DQS_0_DP at (B 4) is labeled only once in the design.
Signal    M_B_DQS_3_DN at (B 4) is labeled only once in the design.
Signal    M_B_DQS_3_DP at (B 4) is labeled only once in the design.
Signal      M_B_DQ_0_7 at (B 4) is labeled only once in the design.
Signal       ZQ0_CHA_1 at (D 7) is labeled only once in the design.
Signal       ZQ1_CHA_1 at (D 7) is labeled only once in the design.
Signal     ODT_B_CHA_1 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_1_0 at (C 4) is labeled only once in the design.
Signal      M_B_DQ_1_4 at (C 4) is labeled only once in the design.
Signal      M_B_DQ_1_1 at (C 4) is labeled only once in the design.
Signal      M_B_DQ_1_2 at (C 4) is labeled only once in the design.
Signal      M_B_DQ_1_7 at (C 4) is labeled only once in the design.
Signal      M_B_DQ_1_6 at (C 4) is labeled only once in the design.
Signal      M_B_DQ_1_5 at (C 4) is labeled only once in the design.
Signal      M_B_DQ_1_3 at (C 4) is labeled only once in the design.
Signal    M_B_DQS_2_DN at (C 4) is labeled only once in the design.
Signal    M_B_DQS_2_DP at (C 4) is labeled only once in the design.
Signal    M_B_DQS_1_DN at (C 4) is labeled only once in the design.
Signal      M_B_DQ_3_2 at (B 4) is labeled only once in the design.
Signal      M_B_DQ_3_0 at (B 4) is labeled only once in the design.
Signal      M_B_DQ_0_3 at (B 4) is labeled only once in the design.
Signal     ODT_A_CHA_1 at (C 7) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i11@ehl_mcl_lib.ram(sch_1):Page3
Signal    M_C_DQS_3_DN at (B 4) is labeled only once in the design.
Signal    M_C_DQS_3_DP at (A 4) is labeled only once in the design.
Signal    M_C_DQS_0_DP at (B 4) is labeled only once in the design.
Signal    M_C_DQS_0_DN at (B 4) is labeled only once in the design.
Signal     ODT_B_CHB_0 at (B 7) is labeled only once in the design.
Signal     ODT_A_CHB_0 at (C 7) is labeled only once in the design.
Signal       ZQ0_CHB_0 at (C 7) is labeled only once in the design.
Signal       ZQ1_CHB_0 at (D 7) is labeled only once in the design.
Signal      M_C_DQ_0_5 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_3_4 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_3_1 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_0_0 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_3_6 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_3_5 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_3_3 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_3_7 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_3_2 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_3_0 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_0_3 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_0_6 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_0_4 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_0_1 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_2_7 at (C 4) is labeled only once in the design.
Signal      M_C_DQ_1_0 at (C 4) is labeled only once in the design.
Signal      M_C_DQ_2_3 at (C 4) is labeled only once in the design.
Signal      M_C_DQ_1_5 at (C 4) is labeled only once in the design.
Signal      M_C_DQ_1_4 at (C 4) is labeled only once in the design.
Signal      M_C_DQ_1_2 at (C 4) is labeled only once in the design.
Signal      M_C_DQ_1_3 at (C 4) is labeled only once in the design.
Signal    M_C_DQS_1_DP at (C 4) is labeled only once in the design.
Signal      M_C_DQ_1_7 at (C 4) is labeled only once in the design.
Signal      M_C_DQ_1_6 at (C 4) is labeled only once in the design.
Signal      M_C_DQ_1_1 at (C 4) is labeled only once in the design.
Signal      M_C_DQ_2_6 at (C 4) is labeled only once in the design.
Signal    M_C_DQS_2_DN at (C 4) is labeled only once in the design.
Signal    M_C_DQS_2_DP at (C 4) is labeled only once in the design.
Signal    M_C_DQS_1_DN at (C 4) is labeled only once in the design.
Signal      M_C_DQ_2_5 at (C 4) is labeled only once in the design.
Signal      M_C_DQ_2_1 at (C 4) is labeled only once in the design.
Signal      M_C_DQ_2_0 at (C 4) is labeled only once in the design.
Signal      M_C_DQ_2_2 at (D 4) is labeled only once in the design.
Signal      M_C_DQ_2_4 at (D 4) is labeled only once in the design.
Signal      M_C_DQ_0_2 at (B 4) is labeled only once in the design.
Signal      M_C_DQ_0_7 at (B 4) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i11@ehl_mcl_lib.ram(sch_1):Page4
Signal       ZQ0_CHB_1 at (D 7) is labeled only once in the design.
Signal     ODT_A_CHB_1 at (C 7) is labeled only once in the design.
Signal     ODT_B_CHB_1 at (B 7) is labeled only once in the design.
Signal       ZQ1_CHB_1 at (D 7) is labeled only once in the design.
Signal    M_D_DQS_0_DN at (B 4) is labeled only once in the design.
Signal      M_D_DQ_3_6 at (B 4) is labeled only once in the design.
Signal    M_D_DQS_3_DN at (B 4) is labeled only once in the design.
Signal    M_D_DQS_3_DP at (B 4) is labeled only once in the design.
Signal    M_D_DQS_0_DP at (B 4) is labeled only once in the design.
Signal      M_D_DQ_3_5 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_3_7 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_3_3 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_3_2 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_3_1 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_3_0 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_3_4 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_1_1 at (C 4) is labeled only once in the design.
Signal      M_D_DQ_1_2 at (C 4) is labeled only once in the design.
Signal      M_D_DQ_1_6 at (C 4) is labeled only once in the design.
Signal      M_D_DQ_1_5 at (C 4) is labeled only once in the design.
Signal      M_D_DQ_1_7 at (C 4) is labeled only once in the design.
Signal      M_D_DQ_1_3 at (C 4) is labeled only once in the design.
Signal    M_D_DQS_2_DP at (C 4) is labeled only once in the design.
Signal    M_D_DQS_2_DN at (C 4) is labeled only once in the design.
Signal    M_D_DQS_1_DP at (C 4) is labeled only once in the design.
Signal      M_D_DQ_0_1 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_0_4 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_0_5 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_0_3 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_0_6 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_0_7 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_0_2 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_0_0 at (B 4) is labeled only once in the design.
Signal      M_D_DQ_2_1 at (C 4) is labeled only once in the design.
Signal      M_D_DQ_2_0 at (D 4) is labeled only once in the design.
Signal      M_D_DQ_2_2 at (D 4) is labeled only once in the design.
Signal      M_D_DQ_2_4 at (D 4) is labeled only once in the design.
Signal      M_D_DQ_1_4 at (C 4) is labeled only once in the design.
Signal      M_D_DQ_1_0 at (C 4) is labeled only once in the design.
Signal      M_D_DQ_2_7 at (C 4) is labeled only once in the design.
Signal      M_D_DQ_2_6 at (C 4) is labeled only once in the design.
Signal      M_D_DQ_2_3 at (C 4) is labeled only once in the design.
Signal      M_D_DQ_2_5 at (C 4) is labeled only once in the design.
Signal    M_D_DQS_1_DN at (C 4) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i12@ehl_mcl_lib.flash(sch_1):Page1
Signal     SPI_MOSI_SW at (C 2) is labeled only once in the design.
Signal       SPI_CS1_N at (A 2) is labeled only once in the design.
Signal     SPI_TPM_CS2 at (B 2) is labeled only once in the design.
Signal      SPI_DQ3_SW at (B 2) is labeled only once in the design.
Signal      SPI_DQ2_SW at (B 2) is labeled only once in the design.
Signal     SPI_MISO_SW at (C 2) is labeled only once in the design.
Signal      SPI_CLK_SW at (C 2) is labeled only once in the design.
Signal        FSPI_IO2 at (B 6) is labeled only once in the design.
Signal        FSPI_CLK at (C 6) is labeled only once in the design.
Signal   FSPI_MOSI_IO0 at (C 6) is labeled only once in the design.
Signal      FSPI_CS0_N at (C 6) is labeled only once in the design.
Signal   FSPI_MISO_IO1 at (C 6) is labeled only once in the design.
Signal      FSPI_CS1_N at (A 6) is labeled only once in the design.
Signal        FSPI_IO3 at (B 6) is labeled only once in the design.
Signal      FSPI_CS2_N at (B 6) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i12@ehl_mcl_lib.flash(sch_1):Page2
Signal    FLASH_PWR_EN at (B 7) is labeled only once in the design.
Signal DEDI_PROG_RST_N at (B 8) is labeled only once in the design.
Signal  FLASH_PWR_VOUT at (B 6) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i2@ehl_mcl_lib.v_r(sch_1):Page1
Signal +VCCIO_VR_3.3VIN at (C 6) is labeled only once in the design.
Signal  VCCIOEN_AND_IN at (A 7) is labeled only once in the design.
Signal VCCIO_VR_EN_ANDOUT at (A 6) is labeled only once in the design.
Signal    VCCIO_VR_BST at (C 5) is labeled only once in the design.
Signal +VCCIO_VR_SWNODE at (C 5) is labeled only once in the design.
Signal  VCCIO_VR_BST_R at (C 4) is labeled only once in the design.
Signal     VCCIO_SENSE at (C 2) is labeled only once in the design.
Signal     VSSIO_SENSE at (B 2) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i2@ehl_mcl_lib.v_r(sch_1):Page2
Signal VCCIN_AUX_VR_VFB_R at (B 7) is labeled only once in the design.
Signal +V12A_VCCIN_AUX_VIN_SEN at (C 5) is labeled only once in the design.
Signal VCCIN_AUX_VR_IMON at (B 5) is labeled only once in the design.
Signal VCCIN_AUX_VR_IREF at (C 5) is labeled only once in the design.
Signal +V1.8_VCCIN_AUX_VR_VDD at (C 5) is labeled only once in the design.
Signal +V3.3A_VCCIN_AUX_VR_VDD at (C 5) is labeled only once in the design.
Signal VCCIN_AUX_VR_VDIFF at (B 5) is labeled only once in the design.
Signal VCCIN_AUX_VR_PSYS at (B 5) is labeled only once in the design.
Signal VCCIN_AUX_VR_VFB at (B 5) is labeled only once in the design.
Signal VCCIN_AUX_VR_TEMP_R at (C 4) is labeled only once in the design.
Signal VCCIN_AUX_VRHOT_N at (B 4) is labeled only once in the design.
Signal VCCIN_AUX_VR_VORTN at (C 4) is labeled only once in the design.
Signal VCCIN_AUX_VR_VOSEN at (C 4) is labeled only once in the design.
Signal VCCIN_AUX_VR_CS_SUM at (C 4) is labeled only once in the design.
Signal VCCIN_AUX_VCCSENSE at (C 1) is labeled only once in the design.
Signal VCCIN_AUX_VSSSENSE at (C 1) is labeled only once in the design.
Signal VCCIN_AUX_VR_IMON_R at (B 7) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i2@ehl_mcl_lib.v_r(sch_1):Page3
Signal +V3.3A_VCCIN_AUX_VCC_PH1 at (C 5) is labeled only once in the design.
Signal VCCIN_AUX_VR_SYNC_PWM_EN at (B 5) is labeled only once in the design.
Signal +VCCIN_AUX_VR_PH1_PHASE at (B 4) is labeled only once in the design.
Signal VCCIN_AUX_VR_PH1_BST at (B 4) is labeled only once in the design.
Signal VCCIN_AUX__VR_PH1_SNUB at (C 2) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i2@ehl_mcl_lib.v_r(sch_1):Page4
Signal     VDD2_VR_3V3 at (C 7) is labeled only once in the design.
Signal     VDD2_VR_EN1 at (C 7) is labeled only once in the design.
Signal    VDD2_VR_MODE at (C 7) is labeled only once in the design.
Signal        NC_OTW_N at (C 7) is labeled only once in the design.
Signal  VDD2_VR_DIS_EN at (A 6) is labeled only once in the design.
Signal  VDD2_VR_EN_MUX at (A 6) is labeled only once in the design.
Signal      NC_VTT_OUT at (C 5) is labeled only once in the design.
Signal       NC_VTTSNS at (C 5) is labeled only once in the design.
Signal    +VREF_VTT_VR at (C 6) is labeled only once in the design.
Signal     VDD2_VR_BST at (C 6) is labeled only once in the design.
Signal     VDD2_VR_VIN at (D 8) is labeled only once in the design.
Signal      VDD2_VR_FB at (C 6) is labeled only once in the design.
Signal   VDD2_VR_BST_R at (C 5) is labeled only once in the design.
Signal      VDD2_VR_SW at (C 6) is labeled only once in the design.
Signal    VDD2_VR_SW_R at (C 4) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i2@ehl_mcl_lib.v_r(sch_1):Page5
Signal VDDQ_TX_VR_EN_MUX_D at (A 6) is labeled only once in the design.
Signal VDDQ_TX_VR_EN_MUX at (A 6) is labeled only once in the design.
Signal  VDDQ_TX_VR_VIN at (C 6) is labeled only once in the design.
Signal   VDDQ_TX_VR_SW at (C 5) is labeled only once in the design.
Signal   VDDQ_TX_VR_FB at (C 5) is labeled only once in the design.
Signal VDDQ_TX_VR_PWRGD at (C 4) is labeled only once in the design.
Signal VDDQ_TX_LP4X_MEM at (B 4) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i2@ehl_mcl_lib.v_r(sch_1):Page6
Signal       VPP_VR_SS at (C 6) is labeled only once in the design.
Signal     VPP_VR_EN_R at (A 6) is labeled only once in the design.
Signal   VPP_VR_EN_DIO at (A 6) is labeled only once in the design.
Signal      VPP_VR_VCC at (C 6) is labeled only once in the design.
Signal      VPP_VR_VIN at (C 6) is labeled only once in the design.
Signal      VPP_VR_BST at (C 5) is labeled only once in the design.
Signal  VPP_VR_SW_SNUB at (A 3) is labeled only once in the design.
Signal   VPP_VR_BST_RC at (C 5) is labeled only once in the design.
Signal     VPP_VR_FB_R at (B 2) is labeled only once in the design.
Signal     PM_SLP_S3_N at (A 7) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i2@ehl_mcl_lib.v_r(sch_1):Page7
Signal    SVID_ALERT_N at (A 8) is labeled only once in the design.
Signal       SVID_DATA at (A 8) is labeled only once in the design.
Signal        SVID_CLK at (A 8) is labeled only once in the design.
Signal     VCCIN_VFB_R at (C 7) is labeled only once in the design.
Signal      IMVP9_IMON at (C 5) is labeled only once in the design.
Signal +V1.8_IMVP9_VDD at (C 5) is labeled only once in the design.
Signal +V12A_IMVP9_VIN_SEN at (C 5) is labeled only once in the design.
Signal       IMVP9_VFB at (C 5) is labeled only once in the design.
Signal     IMVP9_VDIFF at (C 5) is labeled only once in the design.
Signal   ALL_SYS_PWRGD at (B 3) is labeled only once in the design.
Signal   IMVP9_VRHOT_N at (C 4) is labeled only once in the design.
Signal     H_PROCHOT_N at (C 2) is labeled only once in the design.
Signal    VCCIN_CS_SUM at (C 4) is labeled only once in the design.
Signal VCCIN_VR_TEMP_R at (C 4) is labeled only once in the design.
Signal     VSSIN_SENSE at (C 1) is labeled only once in the design.
Signal     VCCIN_SENSE at (C 1) is labeled only once in the design.
Signal +V3.3A_IMVP9_VDD at (C 5) is labeled only once in the design.
Signal      IMVP9_IREF at (C 5) is labeled only once in the design.
Signal  CHGR_PSYS_IMVP at (C 5) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i2@ehl_mcl_lib.v_r(sch_1):Page8
Signal VCCIN_SYNC_PWM1_EN at (B 6) is labeled only once in the design.
Signal +V3.3A_VCCIN_VCC_PH1 at (C 6) is labeled only once in the design.
Signal   VCCIN_PH1_BST at (B 5) is labeled only once in the design.
Signal +VCCIN_PH1_PHASE at (B 5) is labeled only once in the design.
Signal  VCCIN_PH1_SNUB at (C 2) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i2@ehl_mcl_lib.v_r(sch_1):Page9
Signal  VCCST_OVERRIDE at (B 8) is labeled only once in the design.
Signal VCCST_OVERRIDE_N at (C 7) is labeled only once in the design.
Signal PM_SLP_VCCST_OVRD_R at (B 6) is labeled only once in the design.
Signal     V1.8A_VR_EN at (A 6) is labeled only once in the design.
Signal VCCIN_AUX_VALID at (A 6) is labeled only once in the design.
Signal VCCIN_AUX_MIPI60_OVRD at (B 6) is labeled only once in the design.
Signal VCCIN_AUX_MIPI60_OVRD_R at (B 5) is labeled only once in the design.
Signal PM_SLP_S3_S4_VCCST_N at (D 5) is labeled only once in the design.
Signal PM_SLP_VCCST_OVRD at (C 5) is labeled only once in the design.
Signal     VCCSTU_EN_R at (B 4) is labeled only once in the design.
Signal   VCCSTU_EN_OPT at (B 3) is labeled only once in the design.
Signal       VCCSTU_EN at (B 2) is labeled only once in the design.
Signal VCCST_LS_SLEW_CAP at (B 2) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i2@ehl_mcl_lib.v_r(sch_1):Page10
Signal VCCSTG_OVERRIDE_N at (A 7) is labeled only once in the design.
Signal PM_SLP_S0_C10_GATE_N at (B 7) is labeled only once in the design.
Signal V1.8A_ADC_LDO_EN at (C 5) is labeled only once in the design.
Signal VCCSTG_EN_OVERRIDE at (A 5) is labeled only once in the design.
Signal 3.3_VCCST_OVERRIDE_R at (A 4) is labeled only once in the design.
Signal VCCSTG_ENABLE_OVERRIDE_R at (A 3) is labeled only once in the design.
Signal VCCSTG_DISCHARGE_N at (A 2) is labeled only once in the design.
Signal VCCSTG_DISCHARGE_FET at (A 1) is labeled only once in the design.
Signal      VCCSTG_DIS at (A 4) is labeled only once in the design.
Signal   VCCSTG_ENABLE at (A 3) is labeled only once in the design.
Signal V1.8A_ADC_LDO_PG at (C 4) is labeled only once in the design.
Signal V1.8A_ADC_LDO_FB at (C 4) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i2@ehl_mcl_lib.v_r(sch_1):Page11
Signal    EN_VCCSFR_OC at (A 7) is labeled only once in the design.
Signal VCCSFR_OC_SR_CAP at (A 5) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i2@ehl_mcl_lib.v_r(sch_1):Page12
Signal      EN_UFS_3.3 at (A 6) is labeled only once in the design.
Signal UFS_3.3A_OC_SR_CAP at (B 6) is labeled only once in the design.
Signal      EN_UFS_1.8 at (A 2) is labeled only once in the design.
Signal UFS_1.8A_OC_SR_CAP at (B 2) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i7@ehl_mcl_lib.rcomp(sch_1):Page1
Signal      DDR_COMP_0 at (C 6) is labeled only once in the design.
Signal      DDR_COMP_1 at (C 6) is labeled only once in the design.
Signal      DDR_COMP_2 at (C 6) is labeled only once in the design.
Signal       NOA_RCOMP at (B 6) is labeled only once in the design.
Signal      USB2_RCOMP at (D 1) is labeled only once in the design.
Signal    CNV_WT_RCOMP at (C 1) is labeled only once in the design.
Signal    ICLK_BIASREF at (C 3) is labeled only once in the design.
Signal     HSIO_RCOMPN at (D 3) is labeled only once in the design.
Signal     HSIO_RCOMPP at (D 3) is labeled only once in the design.
Signal      GPIO_RCOMP at (B 3) is labeled only once in the design.
Signal PSE_GBE0_RGM0_RCOMP at (B 3) is labeled only once in the design.
Signal      EMMC_RCOMP at (B 3) is labeled only once in the design.
Signal      DDI0_RCOMP at (D 6) is labeled only once in the design.
Signal  PROC_POPIRCOMP at (B 6) is labeled only once in the design.
Signal   PROC_OPIRCOMP at (B 6) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i8@ehl_mcl_lib.misc(sch_1):Page7
Signal CPU_JTAG_TRST_N at (C 8) is labeled only once in the design.
Signal    CPU_JTAG_TDI at (C 8) is labeled only once in the design.
Signal    CPU_JTAG_TMS at (C 8) is labeled only once in the design.
Signal  PCH_JTAG_TCK_R at (C 4) is labeled only once in the design.
Signal PCH_JTAG_TRST_N at (C 1) is labeled only once in the design.
Signal       PCH_JTAGX at (C 1) is labeled only once in the design.
Signal    PCH_JTAG_TCK at (C 1) is labeled only once in the design.
Signal    PCH_JTAG_TDI at (C 1) is labeled only once in the design.
Signal    PCH_JTAG_TDO at (C 1) is labeled only once in the design.
Signal    PCH_JTAG_TMS at (C 1) is labeled only once in the design.
Signal    CPU_JTAG_TDO at (C 8) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i8@ehl_mcl_lib.misc(sch_1):Page8
Signal GP_B02_PMC_VRALERT_N_ESPI_ALERT2_N_PSE_TGPIO25 at (B 7) is labeled only once in the design.
Signal       PROCHOT_N at (C 7) is labeled only once in the design.
Signal        CATERR_N at (D 7) is labeled only once in the design.
Signal   H_VCCST_PWRGD at (A 5) is labeled only once in the design.
Signal      THRMTRIP_N at (B 5) is labeled only once in the design.
Signal     VCCST_PWRGD at (A 2) is labeled only once in the design.
Signal    H_THRMTRIP_N at (B 2) is labeled only once in the design.
Signal     PROC_PWR_GD at (D 4) is labeled only once in the design.
Signal      CPUPWRGD_R at (D 2) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i8@ehl_mcl_lib.misc(sch_1):Page9
Signal          BPM0_N at (C 3) is labeled only once in the design.
Signal          BPM3_N at (B 3) is labeled only once in the design.
Signal          BPM1_N at (C 3) is labeled only once in the design.
Signal          BPM2_N at (B 3) is labeled only once in the design.
Signal        BPM3_N_R at (B 1) is labeled only once in the design.
Signal        BPM2_N_R at (B 1) is labeled only once in the design.
Signal        BPM1_N_R at (C 1) is labeled only once in the design.
Signal        BPM0_N_R at (C 1) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i8@ehl_mcl_lib.misc(sch_1):Page10
Signal GP_B23_PCHHOT_N_SIO_SPI1_CS1_N_PSE_SPI3_CS1_N_PSE_TGPIO28 at (A 7) is labeled only once in the design.
Signal GP_E09_USB2_OC0_N at (A 7) is labeled only once in the design.
Signal GP_E10_TSPI_CS0_N at (A 6) is labeled only once in the design.
Signal GP_C05_PSE_PWM01_PSE_UART3_CTS_N_SML_ALERT0_N_PSE_TGPIO30 at (A 6) is labeled only once in the design.
Signal GP_E11_TSPI_CLK at (A 5) is labeled only once in the design.
Signal GP_F07_PSE_I2S1_SCLK_AVS_I2S4_SCLK_PSE_TGPIO14 at (A 5) is labeled only once in the design.
Signal GP_C02_PSE_PWM00_SMB_ALERT_N_PSE_TGPIO29 at (C 7) is labeled only once in the design.
Signal GP_F02_CNV_RPSE_DT_SIO_UART0_TXD at (B 7) is labeled only once in the design.
Signal GP_B14_SPKR_PMC_TGPIO1_SIO_SPI0_CS1_N_PSE_SPI2_CS1_N at (D 7) is labeled only once in the design.
Signal GP_H02_PSE_GBE1_RGM1_AUXTS_PSE_UART5_RTS_N at (B 6) is labeled only once in the design.
Signal GP_H01_PSE_GBE1_RGM1_RST_N_PSE_UART5_TXD at (C 6) is labeled only once in the design.
Signal GP_H00_PSE_GBE1_RGM1_INT_PSE_UART5_RXD at (D 6) is labeled only once in the design.
Signal GP_E19_DDI0_DDC_SCL_PSE_PWM13_PSE_TGPIO24 at (C 5) is labeled only once in the design.
Signal       DBG_PMODE at (B 5) is labeled only once in the design.
Signal        GP_DSW11 at (D 5) is labeled only once in the design.
Signal GP_R02_HDA_SDO_AVS_I2S0_TXD_PSE_I2S0_TXD_DMIC_CLK_B0 at (B 3) is labeled only once in the design.
Signal        FSPI_IO3 at (A 3) is labeled only once in the design.
Signal        GP_DSW07 at (A 2) is labeled only once in the design.
Signal GP_F10_PSE_I2S1_SFRM_AVS_I2S4_SFRM_PSE_TGPIO15 at (B 1) is labeled only once in the design.
Signal GP_F00_CNV_BRI_DT_SIO_UART0_RTS_N at (C 3) is labeled only once in the design.
Signal GP_B18_SIO_SPI0_MOSI_PSE_SPI2_MOSI at (D 3) is labeled only once in the design.
Signal GP_E06_PSE_PWM10_PSE_TGPIO18 at (B 1) is labeled only once in the design.
Signal        FSPI_IO2 at (C 1) is labeled only once in the design.
Signal   FSPI_MOSI_IO0 at (D 1) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i8@ehl_mcl_lib.misc(sch_1):Page11
Signal GP_DSW09_PMC_SLP_WLAN_N at (C 8) is labeled only once in the design.
Signal GP_B12_PMC_SLP_S0_N at (A 6) is labeled only once in the design.
Signal GP_DSW10_PMC_SLP_S5_N at (C 6) is labeled only once in the design.
Signal GP_DSW05_PMC_SLP_S4_N at (C 6) is labeled only once in the design.
Signal   PMC_SLP_SUS_N at (D 6) is labeled only once in the design.
Signal       PNL_VDDEN at (A 4) is labeled only once in the design.
Signal      PNL_BKLTEN at (A 4) is labeled only once in the design.
Signal GP_R04_HDA_RST_N_DMIC_CLK_A1 at (B 4) is labeled only once in the design.
Signal GP_G08_AVS_I2S2_SFRM_CNV_RF_RESET_N_DMIC_DATA0 at (C 4) is labeled only once in the design.
Signal GP_R05_HDA_SDI1_AVS_I2S1_RXD_DMIC_DATA1 at (B 4) is labeled only once in the design.
Signal GP_R00_HDA_BCLK_AVS_I2S0_SCLK_PSE_I2S0_SCLK at (C 4) is labeled only once in the design.
Signal GP_G20_ESPI_CS0_N at (A 2) is labeled only once in the design.
Signal GP_G22_ESPI_RST0_N at (A 2) is labeled only once in the design.
Signal GP_F09_BOOT_PWR_EN at (B 2) is labeled only once in the design.
Signal GP_B11_PMC_ALERT_N_PSE_TGPIO06 at (D 4) is labeled only once in the design.
Signal        FSPI_CLK at (D 4) is labeled only once in the design.
Signal GP_DSW04_PMC_SLP_S3_N at (B 6) is labeled only once in the design.
Signal GP_B13_PMC_PLTRST_N at (B 6) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i8@ehl_mcl_lib.misc(sch_1):Page12
Signal +VRTC_BATT_IN_OR at (C 4) is labeled only once in the design.
Signal +V3.3A_DSW_RTC_IN at (C 4) is labeled only once in the design.
Signal   +V3.3_MUX_RTC at (C 3) is labeled only once in the design.
Signal RTC_FET_GATE_DSW at (D 3) is labeled only once in the design.
Signal   +VRTC_FET_OUT at (C 2) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page1
Signal GP_E03_DDI1_HPD_PNL_MISC_DDI1_CPU_GP0_PSE_TGPIO15 at (B 2) is labeled only once in the design.
Signal GP_E07_DDI1_DDC_SCL_CPU_GP1_PSE_TGPIO16 at (C 2) is labeled only once in the design.
Signal GP_E14_DDI0_HPD_PNL_MISC_DDI0_PSE_TGPIO19 at (C 2) is labeled only once in the design.
Signal GP_E18_DDI0_DDC_SDA_PSE_PWM12_PSE_TGPIO23 at (C 2) is labeled only once in the design.
Signal GP_E19_DDI0_DDC_SCL_PSE_PWM13_PSE_TGPIO24 at (C 2) is labeled only once in the design.
Signal GP_E17_PNL1_VDDEN_PNL_MISC_DDI2_PSE_PWM11_PSE_TGPIO46 at (B 2) is labeled only once in the design.
Signal GP_E22_PNL1_BKLTCTL_PSE_PWM14_PSE_TGPIO18 at (B 2) is labeled only once in the design.
Signal GP_E23_PNL1_BKLTEN_PSE_PWM15_PSE_TGPIO19 at (B 2) is labeled only once in the design.
Signal GP_E05_DDI1_DDC_SDA_PSE_PWM09_PSE_TGPIO17 at (B 2) is labeled only once in the design.
Signal    MDSI_DE_TE_2 at (C 2) is labeled only once in the design.
Signal EDP_UTILS_MDSI_DE_TE_1 at (C 2) is labeled only once in the design.
Signal       PNL_VDDEN at (C 2) is labeled only once in the design.
Signal      PNL_BKLTEN at (C 2) is labeled only once in the design.
Signal     PNL_BKLTCTL at (C 2) is labeled only once in the design.
Signal       DDI1_TXP2 at (C 7) is labeled only once in the design.
Signal       DDI0_TXP1 at (C 7) is labeled only once in the design.
Signal       DDI0_TXP0 at (C 7) is labeled only once in the design.
Signal       DDI0_TXN0 at (C 7) is labeled only once in the design.
Signal       DDI0_TXN3 at (C 7) is labeled only once in the design.
Signal       DDI0_AUXN at (C 7) is labeled only once in the design.
Signal       DDI1_TXP1 at (C 7) is labeled only once in the design.
Signal       DDI1_TXN2 at (C 7) is labeled only once in the design.
Signal       DDI1_TXN3 at (B 7) is labeled only once in the design.
Signal       DDI2_TXN3 at (B 7) is labeled only once in the design.
Signal       DDI0_TXN1 at (C 7) is labeled only once in the design.
Signal       DDI0_TXN2 at (C 7) is labeled only once in the design.
Signal       DDI0_TXP2 at (C 7) is labeled only once in the design.
Signal       DDI0_TXP3 at (C 7) is labeled only once in the design.
Signal       DDI0_AUXP at (C 7) is labeled only once in the design.
Signal       DDI1_TXN0 at (C 7) is labeled only once in the design.
Signal       DDI1_TXN1 at (C 7) is labeled only once in the design.
Signal       DDI1_TXP0 at (C 7) is labeled only once in the design.
Signal       DDI2_TXP2 at (B 7) is labeled only once in the design.
Signal       DDI2_TXN2 at (B 7) is labeled only once in the design.
Signal       DDI2_TXN1 at (B 7) is labeled only once in the design.
Signal       DDI2_TXP0 at (B 7) is labeled only once in the design.
Signal       DDI2_TXN0 at (B 7) is labeled only once in the design.
Signal       DDI1_AUXP at (B 7) is labeled only once in the design.
Signal       DDI1_AUXN at (B 7) is labeled only once in the design.
Signal       DDI1_TXP3 at (B 7) is labeled only once in the design.
Signal       DDI2_TXP1 at (B 7) is labeled only once in the design.
Signal       DDI2_TXP3 at (B 7) is labeled only once in the design.
Signal       DDI2_AUXN at (B 7) is labeled only once in the design.
Signal       DDI2_AUXP at (B 7) is labeled only once in the design.
Signal      DDI0_RCOMP at (B 7) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page2
Signal      M_A_DQ_3_7 at (B 7) is labeled only once in the design.
Signal      M_A_DQ_3_6 at (B 7) is labeled only once in the design.
Signal      M_A_DQ_3_5 at (B 7) is labeled only once in the design.
Signal      M_A_DQ_3_4 at (B 7) is labeled only once in the design.
Signal  M_A_LP4_CLK_DN at (D 3) is labeled only once in the design.
Signal  M_A_LP4_CLK_DP at (D 3) is labeled only once in the design.
Signal  M_B_LP4_CLK_DP at (D 3) is labeled only once in the design.
Signal  M_B_LP4_CLK_DN at (D 3) is labeled only once in the design.
Signal    M_A_LP4_CKE0 at (D 3) is labeled only once in the design.
Signal    M_A_DQS_1_DN at (B 3) is labeled only once in the design.
Signal    M_A_DQS_1_DP at (B 3) is labeled only once in the design.
Signal    M_A_DQS_0_DP at (B 3) is labeled only once in the design.
Signal    M_A_DQS_0_DN at (B 3) is labeled only once in the design.
Signal     M_B_LP4_CA3 at (B 3) is labeled only once in the design.
Signal      TP_M_0_MA0 at (C 3) is labeled only once in the design.
Signal      TP_M_0_MA1 at (C 3) is labeled only once in the design.
Signal     M_B_LP4_CA5 at (C 3) is labeled only once in the design.
Signal      TP_M_0_MA3 at (C 3) is labeled only once in the design.
Signal      TP_M_0_MA4 at (C 3) is labeled only once in the design.
Signal     M_A_LP4_CA4 at (C 3) is labeled only once in the design.
Signal    M_B_LP4_CKE1 at (C 3) is labeled only once in the design.
Signal     M_B_LP4_CS0 at (C 3) is labeled only once in the design.
Signal    M_A_LP4_CKE1 at (C 3) is labeled only once in the design.
Signal     M_B_LP4_CA4 at (C 3) is labeled only once in the design.
Signal     M_B_LP4_CS1 at (C 3) is labeled only once in the design.
Signal    M_B_LP4_CKE0 at (C 3) is labeled only once in the design.
Signal     M_A_LP4_CS0 at (C 3) is labeled only once in the design.
Signal     M_A_LP4_CA2 at (C 3) is labeled only once in the design.
Signal     M_A_LP4_CA1 at (B 3) is labeled only once in the design.
Signal    M_A_DQS_2_DN at (B 3) is labeled only once in the design.
Signal     M_A_LP4_CA0 at (C 3) is labeled only once in the design.
Signal      TP_M_0_M12 at (B 3) is labeled only once in the design.
Signal     M_A_LP4_CA5 at (C 3) is labeled only once in the design.
Signal      TP_M_0_BG1 at (C 3) is labeled only once in the design.
Signal     TP_M_0_ODT1 at (B 3) is labeled only once in the design.
Signal     M_A_LP4_CA3 at (B 3) is labeled only once in the design.
Signal     M_B_LP4_CA0 at (B 3) is labeled only once in the design.
Signal     M_B_LP4_CA2 at (B 3) is labeled only once in the design.
Signal     TP_M_0_ODT0 at (B 3) is labeled only once in the design.
Signal     M_B_LP4_CA1 at (B 3) is labeled only once in the design.
Signal     M_A_LP4_CS1 at (C 3) is labeled only once in the design.
Signal      TP_M_0_M11 at (B 3) is labeled only once in the design.
Signal      TP_M_0_BA1 at (C 3) is labeled only once in the design.
Signal    M_B_DQS_3_DN at (A 3) is labeled only once in the design.
Signal    M_B_DQS_2_DP at (A 3) is labeled only once in the design.
Signal    M_B_DQS_1_DN at (A 3) is labeled only once in the design.
Signal    M_A_DQS_3_DN at (B 3) is labeled only once in the design.
Signal    M_B_DQS_0_DN at (B 3) is labeled only once in the design.
Signal    M_A_DQS_3_DP at (B 3) is labeled only once in the design.
Signal   TP_M_0_PARITY at (A 3) is labeled only once in the design.
Signal    TP_M_0_ACT_N at (A 3) is labeled only once in the design.
Signal TP_D4CH0_CA_VREF at (A 3) is labeled only once in the design.
Signal TP_D4CH1_CA_VREF at (A 3) is labeled only once in the design.
Signal TP_DDR_VTT_CTRL at (A 3) is labeled only once in the design.
Signal    M_B_DQS_3_DP at (A 3) is labeled only once in the design.
Signal    M_B_DQS_0_DP at (B 3) is labeled only once in the design.
Signal    M_A_DQS_2_DP at (B 3) is labeled only once in the design.
Signal    M_B_DQS_1_DP at (A 3) is labeled only once in the design.
Signal    M_B_DQS_2_DN at (A 3) is labeled only once in the design.
Signal      M_A_DQ_0_7 at (D 7) is labeled only once in the design.
Signal      M_A_DQ_0_1 at (D 7) is labeled only once in the design.
Signal      M_A_DQ_0_0 at (D 7) is labeled only once in the design.
Signal      M_A_DQ_0_3 at (D 7) is labeled only once in the design.
Signal      M_A_DQ_0_4 at (D 7) is labeled only once in the design.
Signal      M_A_DQ_0_5 at (D 7) is labeled only once in the design.
Signal      M_A_DQ_0_6 at (D 7) is labeled only once in the design.
Signal      M_A_DQ_0_2 at (D 7) is labeled only once in the design.
Signal      M_A_DQ_1_4 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_1_5 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_1_6 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_1_7 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_3_1 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_3_0 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_2_0 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_2_3 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_2_4 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_2_1 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_2_2 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_2_7 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_2_5 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_2_6 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_1_3 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_1_2 at (C 7) is labeled only once in the design.
Signal      M_B_DQ_1_1 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_1_3 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_0_0 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_0_1 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_0_2 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_0_4 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_0_5 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_0_6 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_0_3 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_0_7 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_1_2 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_1_0 at (B 7) is labeled only once in the design.
Signal      M_A_DQ_3_3 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_3_2 at (C 7) is labeled only once in the design.
Signal      M_B_DQ_3_1 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_2_7 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_2_6 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_3_4 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_3_6 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_3_5 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_3_3 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_3_2 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_3_0 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_2_5 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_2_3 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_2_2 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_2_4 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_1_5 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_2_1 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_1_4 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_2_0 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_1_6 at (B 7) is labeled only once in the design.
Signal      M_B_DQ_1_7 at (B 7) is labeled only once in the design.
Signal      DDR_COMP_0 at (A 7) is labeled only once in the design.
Signal      DDR_COMP_1 at (A 7) is labeled only once in the design.
Signal      DDR_COMP_2 at (A 7) is labeled only once in the design.
Signal      M_B_DQ_3_7 at (A 7) is labeled only once in the design.
Signal      TP_M_0_M10 at (B 3) is labeled only once in the design.
Signal      M_A_DQ_1_1 at (C 7) is labeled only once in the design.
Signal      M_A_DQ_1_0 at (C 7) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page3
Signal  M_C_LP4_CLK_DP at (D 3) is labeled only once in the design.
Signal  M_D_LP4_CLK_DP at (D 3) is labeled only once in the design.
Signal  M_D_LP4_CLK_DN at (D 3) is labeled only once in the design.
Signal  M_C_LP4_CLK_DN at (D 3) is labeled only once in the design.
Signal    M_C_DQS_0_DN at (B 3) is labeled only once in the design.
Signal    M_C_DQS_0_DP at (B 3) is labeled only once in the design.
Signal    M_C_DQS_1_DN at (B 3) is labeled only once in the design.
Signal     TP_M_1_ODT1 at (B 3) is labeled only once in the design.
Signal     TP_M_1_ODT0 at (B 3) is labeled only once in the design.
Signal     M_D_LP4_CA2 at (B 3) is labeled only once in the design.
Signal     M_D_LP4_CA0 at (B 3) is labeled only once in the design.
Signal      TP_M_1_M12 at (B 3) is labeled only once in the design.
Signal      TP_M_1_M11 at (B 3) is labeled only once in the design.
Signal      TP_M_1_M10 at (B 3) is labeled only once in the design.
Signal     M_C_LP4_CA3 at (B 3) is labeled only once in the design.
Signal     M_C_LP4_CA1 at (B 3) is labeled only once in the design.
Signal      TP_M_1_BG1 at (C 3) is labeled only once in the design.
Signal     M_C_LP4_CA5 at (C 3) is labeled only once in the design.
Signal      TP_M_1_MA0 at (C 3) is labeled only once in the design.
Signal      TP_M_1_MA1 at (C 3) is labeled only once in the design.
Signal     M_D_LP4_CA5 at (C 3) is labeled only once in the design.
Signal      TP_M_1_MA3 at (C 3) is labeled only once in the design.
Signal      TP_M_1_MA4 at (C 3) is labeled only once in the design.
Signal     M_C_LP4_CA2 at (C 3) is labeled only once in the design.
Signal     M_C_LP4_CS0 at (C 3) is labeled only once in the design.
Signal    M_D_LP4_CKE1 at (C 3) is labeled only once in the design.
Signal     M_D_LP4_CS1 at (C 3) is labeled only once in the design.
Signal      TP_M_1_BA1 at (C 3) is labeled only once in the design.
Signal     M_C_LP4_CS1 at (C 3) is labeled only once in the design.
Signal     M_D_LP4_CS0 at (C 3) is labeled only once in the design.
Signal    M_C_LP4_CKE0 at (C 3) is labeled only once in the design.
Signal    M_C_LP4_CKE1 at (C 3) is labeled only once in the design.
Signal    M_D_LP4_CKE0 at (C 3) is labeled only once in the design.
Signal     M_C_LP4_CA4 at (B 3) is labeled only once in the design.
Signal     M_D_LP4_CA4 at (C 3) is labeled only once in the design.
Signal     M_C_LP4_CA0 at (C 3) is labeled only once in the design.
Signal    M_D_DQS_3_DN at (A 3) is labeled only once in the design.
Signal   TP_M_1_PARITY at (A 3) is labeled only once in the design.
Signal    M_D_DQS_3_DP at (A 3) is labeled only once in the design.
Signal    M_D_DQS_1_DN at (A 3) is labeled only once in the design.
Signal    M_C_DQS_2_DP at (B 3) is labeled only once in the design.
Signal    M_C_DQS_3_DN at (B 3) is labeled only once in the design.
Signal    M_C_DQS_3_DP at (B 3) is labeled only once in the design.
Signal    M_D_DQS_0_DN at (B 3) is labeled only once in the design.
Signal    M_C_DQS_1_DP at (B 3) is labeled only once in the design.
Signal    M_D_DQS_2_DP at (A 3) is labeled only once in the design.
Signal    M_D_DQS_2_DN at (A 3) is labeled only once in the design.
Signal    M_D_DQS_1_DP at (A 3) is labeled only once in the design.
Signal    M_D_DQS_0_DP at (B 3) is labeled only once in the design.
Signal    TP_M_1_ACT_N at (A 3) is labeled only once in the design.
Signal    M_C_DQS_2_DN at (B 3) is labeled only once in the design.
Signal      M_C_DQ_0_5 at (D 7) is labeled only once in the design.
Signal      M_C_DQ_0_4 at (D 7) is labeled only once in the design.
Signal      M_D_DQ_0_7 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_0_6 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_0_5 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_0_1 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_0_2 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_0_4 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_1_2 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_1_0 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_1_1 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_0_3 at (B 7) is labeled only once in the design.
Signal      M_C_DQ_3_5 at (B 7) is labeled only once in the design.
Signal      M_C_DQ_3_6 at (B 7) is labeled only once in the design.
Signal      M_C_DQ_3_7 at (B 7) is labeled only once in the design.
Signal      M_C_DQ_1_3 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_1_4 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_2_1 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_2_0 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_1_7 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_1_2 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_1_6 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_1_5 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_1_0 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_1_1 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_2_3 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_2_2 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_3_1 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_3_0 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_2_7 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_2_4 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_2_5 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_2_6 at (C 7) is labeled only once in the design.
Signal      M_D_DQ_0_0 at (B 7) is labeled only once in the design.
Signal      M_C_DQ_3_4 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_3_7 at (A 7) is labeled only once in the design.
Signal      M_D_DQ_2_6 at (A 7) is labeled only once in the design.
Signal      M_D_DQ_2_7 at (A 7) is labeled only once in the design.
Signal      M_D_DQ_3_0 at (A 7) is labeled only once in the design.
Signal      M_D_DQ_3_1 at (A 7) is labeled only once in the design.
Signal      M_D_DQ_3_4 at (A 7) is labeled only once in the design.
Signal      M_D_DQ_3_5 at (A 7) is labeled only once in the design.
Signal      M_D_DQ_3_3 at (A 7) is labeled only once in the design.
Signal      M_D_DQ_2_4 at (A 7) is labeled only once in the design.
Signal      M_D_DQ_1_5 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_1_6 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_2_0 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_2_2 at (A 7) is labeled only once in the design.
Signal      M_D_DQ_2_3 at (A 7) is labeled only once in the design.
Signal      M_D_DQ_1_7 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_2_1 at (A 7) is labeled only once in the design.
Signal      M_D_DQ_1_4 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_1_3 at (B 7) is labeled only once in the design.
Signal      M_D_DQ_3_2 at (A 7) is labeled only once in the design.
Signal      M_D_DQ_2_5 at (A 7) is labeled only once in the design.
Signal      M_D_DQ_3_6 at (A 7) is labeled only once in the design.
Signal      M_C_DQ_3_3 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_3_2 at (C 7) is labeled only once in the design.
Signal      M_C_DQ_0_0 at (D 7) is labeled only once in the design.
Signal      M_C_DQ_0_1 at (D 7) is labeled only once in the design.
Signal      M_C_DQ_0_2 at (D 7) is labeled only once in the design.
Signal      M_C_DQ_0_3 at (D 7) is labeled only once in the design.
Signal      M_C_DQ_0_6 at (D 7) is labeled only once in the design.
Signal      M_C_DQ_0_7 at (D 7) is labeled only once in the design.
Signal     M_D_LP4_CA1 at (B 3) is labeled only once in the design.
Signal     M_D_LP4_CA3 at (B 3) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page4
Signal     JTAG_PREQ_N at (D 3) is labeled only once in the design.
Signal       PCH_JTAGX at (D 3) is labeled only once in the design.
Signal    PCH_JTAG_TMS at (D 3) is labeled only once in the design.
Signal    PCH_JTAG_TDO at (D 3) is labeled only once in the design.
Signal    PCH_JTAG_TDI at (D 3) is labeled only once in the design.
Signal    PCH_JTAG_TCK at (D 3) is labeled only once in the design.
Signal PCH_JTAG_TRST_N at (D 3) is labeled only once in the design.
Signal     JTAG_PRDY_N at (D 3) is labeled only once in the design.
Signal GP_G16_ESPI_IO1 at (B 1) is labeled only once in the design.
Signal GP_G18_ESPI_IO3_PMC_SUSACK_N at (B 1) is labeled only once in the design.
Signal GP_F14_AVS_I2S4_RXD_PSE_TRACEDATA_1 at (A 1) is labeled only once in the design.
Signal GP_F13_AVS_I2S4_SFRM_PSE_SWDIO at (A 1) is labeled only once in the design.
Signal GP_G21_ESPI_CLK at (B 1) is labeled only once in the design.
Signal GP_G15_ESPI_IO0 at (B 1) is labeled only once in the design.
Signal GP_G17_ESPI_IO2_PMC_SUSPWRDNACK at (B 1) is labeled only once in the design.
Signal GP_F11_PSE_TRACECLK_PSE_TGPIO49 at (A 1) is labeled only once in the design.
Signal GP_F12_AVS_I2S4_TXD_PSE_TRACESWO at (A 1) is labeled only once in the design.
Signal GP_F15_PSE_TRACEDATA_2 at (A 1) is labeled only once in the design.
Signal GP_B23_PCHHOT_N_SIO_SPI1_CS1_N_PSE_SPI3_CS1_N_PSE_TGPIO28 at (B 1) is labeled only once in the design.
Signal GP_B03_CPU_GP2_ESPI_ALERT0_N_PSE_TGPIO26 at (B 1) is labeled only once in the design.
Signal GP_B02_PMC_VRALERT_N_ESPI_ALERT2_N_PSE_TGPIO25 at (A 1) is labeled only once in the design.
Signal GP_B14_SPKR_PMC_TGPIO1_SIO_SPI0_CS1_N_PSE_SPI2_CS1_N at (A 1) is labeled only once in the design.
Signal GP_B10_SIO_I2C5_SCL_PSE_I2C2_SCL_ESPI_ALERT3_N at (A 1) is labeled only once in the design.
Signal GP_B09_SIO_I2C5_SDA_PSE_I2C2_SDA_ESPI_CS3_N at (A 1) is labeled only once in the design.
Signal GP_F16_AVS_I2S4_SCLK_PSE_SWCLK at (A 1) is labeled only once in the design.
Signal GP_F05_MODEM_CLKREQ_CRF_XTAL_CLKREQ_PSE_TGPIO14 at (A 1) is labeled only once in the design.
Signal GP_F17_PSE_TRACEDATA_3_PSE_TGPIO50 at (A 1) is labeled only once in the design.
Signal GP_B04_CPU_GP3_ESPI_ALERT1_N_PSE_TGPIO27 at (B 1) is labeled only once in the design.
Signal GP_G20_ESPI_CS0_N at (B 1) is labeled only once in the design.
Signal GP_G22_ESPI_RST0_N at (B 1) is labeled only once in the design.
Signal   PROC_OPIRCOMP at (C 3) is labeled only once in the design.
Signal      THRMTRIP_N at (C 3) is labeled only once in the design.
Signal        CATERR_N at (C 3) is labeled only once in the design.
Signal       PROCHOT_N at (C 3) is labeled only once in the design.
Signal  PROC_POPIRCOMP at (D 6) is labeled only once in the design.
Signal    CPU_JTAG_TCK at (D 6) is labeled only once in the design.
Signal    CPU_JTAG_TMS at (C 6) is labeled only once in the design.
Signal    CPU_JTAG_TDO at (C 6) is labeled only once in the design.
Signal    CPU_JTAG_TDI at (C 6) is labeled only once in the design.
Signal CPU_JTAG_TRST_N at (C 6) is labeled only once in the design.
Signal          BPM0_N at (C 6) is labeled only once in the design.
Signal          BPM1_N at (C 6) is labeled only once in the design.
Signal          BPM2_N at (C 6) is labeled only once in the design.
Signal          BPM3_N at (C 6) is labeled only once in the design.
Signal        FSPI_IO3 at (B 7) is labeled only once in the design.
Signal      FSPI_CS0_N at (B 7) is labeled only once in the design.
Signal        FSPI_CLK at (B 7) is labeled only once in the design.
Signal   FSPI_MOSI_IO0 at (B 7) is labeled only once in the design.
Signal      FSPI_CS1_N at (B 7) is labeled only once in the design.
Signal        FSPI_IO2 at (B 7) is labeled only once in the design.
Signal   FSPI_MISO_IO1 at (B 7) is labeled only once in the design.
Signal GP_E10_TSPI_CS0_N at (A 8) is labeled only once in the design.
Signal GP_E13_TSPI_MOSI_IO0 at (A 8) is labeled only once in the design.
Signal GP_E12_TSPI_MISO_IO1 at (A 8) is labeled only once in the design.
Signal GP_E01_TSPI_IO2 at (A 8) is labeled only once in the design.
Signal GP_E02_TSPI_IO3 at (A 8) is labeled only once in the design.
Signal GP_E06_PSE_PWM10_PSE_TGPIO18 at (A 8) is labeled only once in the design.
Signal GP_E11_TSPI_CLK at (A 8) is labeled only once in the design.
Signal      FSPI_CS2_N at (B 7) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page5
Signal GP_U09_ISI_SPIS_SCLK_ISI_I2CS_SCL_PSE_TGPIO11 at (C 8) is labeled only once in the design.
Signal GP_U05_ISI_SPIM_SCLK_PSE_SPI1_CLK at (C 8) is labeled only once in the design.
Signal GP_B18_SIO_SPI0_MOSI_PSE_SPI2_MOSI at (D 8) is labeled only once in the design.
Signal GP_B17_SIO_SPI0_MISO_PSE_SPI2_MISO at (D 8) is labeled only once in the design.
Signal GP_B15_SIO_SPI0_CS0_N_PSE_SPI2_CS0_N_ESPI_CS1_N at (D 8) is labeled only once in the design.
Signal GP_D00_PSE_QEPA0_PSE_SPI1_CS0_N_PSE_TGPIO32 at (C 8) is labeled only once in the design.
Signal GP_D03_PSE_PWM06_PSE_SPI1_MOSI_PSE_TGPIO35 at (C 8) is labeled only once in the design.
Signal GP_D09_PSE_SPI0_CS0_N_SIO_SPI2_CS0_N_PSE_TGPIO10 at (C 8) is labeled only once in the design.
Signal GP_B20_SIO_SPI1_CLK_PSE_SPI3_CLK at (D 8) is labeled only once in the design.
Signal GP_B22_SIO_SPI1_MOSI_PSE_SPI3_MOSI at (C 8) is labeled only once in the design.
Signal GP_B21_SIO_SPI1_MISO_PSE_SPI3_MISO at (C 8) is labeled only once in the design.
Signal GP_B19_SIO_SPI1_CS0_N_PSE_SPI3_CS0_N_ESPI_CS2_N at (C 8) is labeled only once in the design.
Signal GP_D02_PSE_QEPI0_PSE_SPI1_MISO_PSE_TGPIO34 at (C 8) is labeled only once in the design.
Signal GP_U17_ISI_OKNOK_1 at (B 8) is labeled only once in the design.
Signal GP_U10_ISI_SPIS_MISO_ISI_I2CS_SDA_PSE_TGPIO12 at (C 8) is labeled only once in the design.
Signal GP_U06_ISI_SPIM_MISO_PSE_SPI1_MISO at (C 8) is labeled only once in the design.
Signal GP_U04_ISI_SPIM_CS_PSE_SPI1_CS0_N at (C 8) is labeled only once in the design.
Signal GP_U08_ISI_SPIS_CS_PSE_TGPIO10 at (C 8) is labeled only once in the design.
Signal GP_U16_ISI_OKNOK_0 at (B 8) is labeled only once in the design.
Signal GP_D01_PSE_QEPB0_PSE_SPI1_CLK_PSE_TGPIO33 at (C 8) is labeled only once in the design.
Signal GP_U18_ISI_ALERT at (B 8) is labeled only once in the design.
Signal GP_U14_ISI_CHX_RLY_SWTCH at (B 8) is labeled only once in the design.
Signal GP_D04_PSE_PWM02_PSE_SPI1_CS1_N_PSE_TGPIO36 at (C 8) is labeled only once in the design.
Signal GP_U13_ISI_CHX_OKNOK_1 at (B 8) is labeled only once in the design.
Signal GP_U15_ISI_CHX_PMIC_EN_PSE_TGPIO13 at (B 8) is labeled only once in the design.
Signal GP_U12_ISI_CHX_OKNOK_0 at (B 8) is labeled only once in the design.
Signal     I2C4_VR_SCL at (A 3) is labeled only once in the design.
Signal     I2C4_VR_SDA at (A 3) is labeled only once in the design.
Signal GP_B11_PMC_ALERT_N_PSE_TGPIO06 at (C 1) is labeled only once in the design.
Signal GP_C02_PSE_PWM00_SMB_ALERT_N_PSE_TGPIO29 at (D 1) is labeled only once in the design.
Signal GP_C01_SMB_DATA_PSE_I2C3_SDA_PSE_TGPIO19 at (D 1) is labeled only once in the design.
Signal GP_B08_PSE_I2C1_SDA_PSE_TGPIO09 at (C 1) is labeled only once in the design.
Signal GP_H05_SIO_I2C2_SCL_PSE_PWM09_PSE_TGPIO11 at (C 1) is labeled only once in the design.
Signal GP_H06_SIO_I2C3_SDA_PSE_I2C5_SDA_PSE_PWM10 at (C 1) is labeled only once in the design.
Signal GP_B07_PSE_I2C1_SCL_PSE_TGPIO08 at (C 1) is labeled only once in the design.
Signal GP_B06_PSE_I2C0_SDA_PSE_TGPIO07 at (D 1) is labeled only once in the design.
Signal GP_D13_PSE_QEPA1_PSE_TGPIO37 at (C 1) is labeled only once in the design.
Signal GP_C18_PSE_I2C4_SDA_SML_DATA0_SIO_I2C1_SDA at (C 1) is labeled only once in the design.
Signal GP_T01_PSE_QEPB2_SIO_I2C6_SCL_PSE_TGPIO09 at (C 1) is labeled only once in the design.
Signal GP_H04_SIO_I2C2_SDA_PSE_PWM08_PSE_TGPIO10 at (C 1) is labeled only once in the design.
Signal GP_H07_SIO_I2C3_SCL_PSE_I2C5_SCL_PSE_PWM11 at (C 1) is labeled only once in the design.
Signal GP_T00_PSE_QEPA2_SIO_I2C6_SDA_PSE_TGPIO08 at (C 1) is labeled only once in the design.
Signal GP_C19_PSE_I2C4_SCL_SML_CLK0_SIO_I2C1_SCL at (C 1) is labeled only once in the design.
Signal GP_D14_PSE_QEPB1_PSE_TGPIO38 at (C 1) is labeled only once in the design.
Signal GP_U19_PSE_QEPI3_PSE_TGPIO12 at (B 1) is labeled only once in the design.
Signal GP_B05_PSE_I2C0_SCL_PSE_TGPIO06 at (D 1) is labeled only once in the design.
Signal GP_D16_PSE_QEPI1_PSE_TGPIO40 at (B 1) is labeled only once in the design.
Signal      GPIO_RCOMP at (B 1) is labeled only once in the design.
Signal GP_T03_SIO_I2C7_SCL_PSE_TGPIO06 at (B 1) is labeled only once in the design.
Signal GP_T02_PSE_QEPI2_SIO_I2C7_SDA_PSE_TGPIO07 at (B 1) is labeled only once in the design.
Signal GP_U07_PSE_QEPA3_PSE_SPI1_MOSI_PSE_TGPIO10 at (B 1) is labeled only once in the design.
Signal GP_U11_PSE_QEPB3_PSE_TGPIO11 at (B 1) is labeled only once in the design.
Signal GP_C00_SMB_CLK_PSE_I2C3_SCL_PSE_TGPIO18 at (D 1) is labeled only once in the design.
Signal GP_B16_SIO_SPI0_CLK_PSE_SPI2_CLK at (D 8) is labeled only once in the design.
Signal GP_D15_PSE_PWM03_SIO_SPI2_CS1_N_PSE_SPI0_CS1_N_PSE_TGPIO39 at (C 8) is labeled only once in the design.
Signal GP_D11_PSE_SPI0_MISO_SIO_SPI2_MISO_PSE_TGPIO12 at (C 8) is labeled only once in the design.
Signal GP_D12_PSE_SPI0_MOSI_SIO_SPI2_MOSI_PSE_TGPIO13 at (C 8) is labeled only once in the design.
Signal GP_D10_PSE_SPI0_CLK_SIO_SPI2_CLK_PSE_TGPIO11 at (C 8) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page6
Signal PSE_GBE0_RGM0_RCOMP at (A 8) is labeled only once in the design.
Signal GP_U03_GBE_RGM2_AUXTS_PSE_I2C7_SDA at (A 8) is labeled only once in the design.
Signal GP_U02_GBE_RGM2_PPS_PSE_I2C7_SCL at (A 8) is labeled only once in the design.
Signal GP_U01_GBE_RGM2_RST_N_PSE_I2C6_SDA at (B 8) is labeled only once in the design.
Signal GP_U00_GBE_RGM2_INT_PSE_I2C6_SCL at (B 8) is labeled only once in the design.
Signal GP_T07_PSE_GBE0_RGM0_PPS_PSE_TGPIO59 at (C 8) is labeled only once in the design.
Signal GP_T06_PSE_GBE0_RGM0_AUXTS_USB2_OC1_N at (C 8) is labeled only once in the design.
Signal GP_T05_PSE_GBE0_RGM0_RST_N at (D 8) is labeled only once in the design.
Signal GP_T04_PSE_GBE0_RGM0_INT at (C 8) is labeled only once in the design.
Signal GP_H03_PSE_GBE1_RGM1_PPS_PSE_UART5_CTS_N_PSE_TGPIO21 at (B 8) is labeled only once in the design.
Signal GP_H02_PSE_GBE1_RGM1_AUXTS_PSE_UART5_RTS_N at (B 8) is labeled only once in the design.
Signal GP_H01_PSE_GBE1_RGM1_RST_N_PSE_UART5_TXD at (C 8) is labeled only once in the design.
Signal GP_H00_PSE_GBE1_RGM1_INT_PSE_UART5_RXD at (B 8) is labeled only once in the design.
Signal GP_C16_GBE_RGM2_MDIO_PSE_UART3_RXD_SIO_I2C0_SDA at (A 8) is labeled only once in the design.
Signal GP_C07_PSE_GBE1_RGM1_MDIO_PSE_HSUART3_RE at (B 8) is labeled only once in the design.
Signal GP_C06_PSE_GBE1_RGM1_MDC at (B 8) is labeled only once in the design.
Signal GP_C05_PSE_PWM01_PSE_UART3_CTS_N_SML_ALERT0_N_PSE_TGPIO30 at (A 8) is labeled only once in the design.
Signal GP_C03_PSE_GBE0_RGM0_MDC_PSE_HSUART3_EN at (C 8) is labeled only once in the design.
Signal GP_A23_PSE_GBE0_RGM0_RXCTL at (C 8) is labeled only once in the design.
Signal GP_A22_PSE_GBE1_RGM1_RXD0_AVS_I2S5_RXD at (B 8) is labeled only once in the design.
Signal GP_A21_PSE_GBE1_RGM1_RXD1_AVS_I2S5_TXD at (B 8) is labeled only once in the design.
Signal GP_A19_PSE_GBE1_RGM1_RXD3_AVS_I2S5_SCLK at (B 8) is labeled only once in the design.
Signal GP_A17_PSE_GBE1_RGM1_RXCLK at (B 8) is labeled only once in the design.
Signal GP_A16_PSE_GBE1_RGM1_TXCTL at (B 8) is labeled only once in the design.
Signal GP_A15_PSE_GBE1_RGM1_TXCLK at (B 8) is labeled only once in the design.
Signal GP_A14_PSE_GBE1_RGM1_TXD0 at (B 8) is labeled only once in the design.
Signal GP_A13_PSE_GBE1_RGM1_TXD1 at (B 8) is labeled only once in the design.
Signal GP_A12_PSE_GBE1_RGM1_TXD2 at (B 8) is labeled only once in the design.
Signal GP_A11_PSE_GBE1_RGM1_TXD3 at (B 8) is labeled only once in the design.
Signal GP_A10_PSE_GBE0_RGM0_RXD0 at (C 8) is labeled only once in the design.
Signal GP_A09_PSE_GBE0_RGM0_RXD1 at (C 8) is labeled only once in the design.
Signal GP_A08_PSE_GBE0_RGM0_RXD2 at (C 8) is labeled only once in the design.
Signal GP_A07_PSE_GBE0_RGM0_RXD3 at (C 8) is labeled only once in the design.
Signal GP_A06_PSE_GBE0_RGM0_RXCLK at (C 8) is labeled only once in the design.
Signal GP_A05_PSE_GBE0_RGM0_TXCTL at (C 8) is labeled only once in the design.
Signal GP_A04_PSE_GBE0_RGM0_TXCLK at (C 8) is labeled only once in the design.
Signal GP_A03_PSE_GBE0_RGM0_TXD0 at (C 8) is labeled only once in the design.
Signal GP_A02_PSE_GBE0_RGM0_TXD1 at (C 8) is labeled only once in the design.
Signal GP_A01_PSE_GBE0_RGM0_TXD2 at (C 8) is labeled only once in the design.
Signal GP_A00_PSE_GBE0_RGM0_TXD3 at (C 8) is labeled only once in the design.
Signal        PSE_ADC0 at (B 1) is labeled only once in the design.
Signal GP_T10_PSE_HSUART2_RE at (C 1) is labeled only once in the design.
Signal GP_H20_PSE_PWM07_DDI2_HPD_PSE_TGPIO55 at (B 1) is labeled only once in the design.
Signal GP_C10_PSE_TGPIO05 at (A 1) is labeled only once in the design.
Signal GP_T09_PSE_HSUART2_EN at (B 1) is labeled only once in the design.
Signal GP_T14_PSE_UART2_RTS_N_SIO_UART0_RTS_N_PSE_HSUART2_DE at (C 1) is labeled only once in the design.
Signal        PSE_ADC5 at (A 1) is labeled only once in the design.
Signal        PSE_ADC6 at (A 1) is labeled only once in the design.
Signal        PSE_ADC7 at (A 1) is labeled only once in the design.
Signal        PSE_ADC4 at (B 1) is labeled only once in the design.
Signal        PSE_ADC2 at (B 1) is labeled only once in the design.
Signal        PSE_ADC1 at (B 1) is labeled only once in the design.
Signal GP_H19_DDI2_DDC_SDA_PMC_TGPIO0_PSE_TGPIO20 at (B 1) is labeled only once in the design.
Signal GP_C21_PSE_UART4_TXD_CNV_MFUART0_TXD_SIO_UART2_TXD at (B 1) is labeled only once in the design.
Signal GP_T15_PSE_UART2_CTS_N_SIO_UART0_CTS_N at (C 1) is labeled only once in the design.
Signal GP_T12_PSE_UART2_RXD_SIO_UART0_RXD at (C 1) is labeled only once in the design.
Signal GP_T13_PSE_UART2_TXD_SIO_UART0_TXD at (C 1) is labeled only once in the design.
Signal GP_H23_PSE_HSUART1_EN_PSE_TGPIO58 at (C 1) is labeled only once in the design.
Signal GP_H22_PSE_HSUART1_RE_PSE_TGPIO57 at (C 1) is labeled only once in the design.
Signal GP_H21_PSE_HSUART1_DE_PSE_UART1_RTS_N_PSE_TGPIO56 at (C 1) is labeled only once in the design.
Signal GP_H15_PSE_UART1_CTS_N_M2_SKT2_CFG3_PSE_TGPIO54 at (C 1) is labeled only once in the design.
Signal GP_H13_PSE_UART1_TXD_M2_SKT2_CFG1_PSE_TGPIO52 at (C 1) is labeled only once in the design.
Signal GP_C09_PSE_HSUART0_EN at (C 1) is labeled only once in the design.
Signal GP_C12_PSE_UART0_RXD_SIO_UART1_RXD at (C 1) is labeled only once in the design.
Signal GP_C13_PSE_UART0_TXD_SIO_UART1_TXD at (C 1) is labeled only once in the design.
Signal        PSE_ADC3 at (B 1) is labeled only once in the design.
Signal GP_C20_PSE_UART4_RXD_CNV_MFUART0_RXD_SIO_UART2_RXD at (B 1) is labeled only once in the design.
Signal GP_C23_PSE_UART4_CTS_N_ISI_SPIS_MOSI_CNV_MFUART0_CTS_N_SIO_UART2_CTS_N at (B 1) is labeled only once in the design.
Signal GP_D17_PSE_PWM04_ISI_SPIM_MOSI_PSE_TGPIO41 at (B 1) is labeled only once in the design.
Signal GP_D18_PSE_PWM05_ISI_SPIS_MOSI_PSE_TGPIO42 at (B 1) is labeled only once in the design.
Signal GP_C22_PSE_UART4_RTS_N_ISI_SPIM_MOSI_CNV_MFUART0_RTS_N_SIO_UART2_RTS_N at (B 1) is labeled only once in the design.
Signal GP_H12_PSE_UART1_RXD_M2_SKT2_CFG0_PSE_TGPIO51 at (C 1) is labeled only once in the design.
Signal GP_C11_PSE_HSUART0_RE at (C 1) is labeled only once in the design.
Signal GP_C14_PSE_UART0_RTS_N_PSE_HSUART0_DE_SIO_UART1_RTS_N at (C 1) is labeled only once in the design.
Signal GP_C15_PSE_UART0_CTS_N_SIO_UART1_CTS_N at (C 1) is labeled only once in the design.
Signal GP_C04_PSE_GBE0_RGM0_MDIO_PSE_UART3_RTS_N_PSE_HSUART3_DE at (C 8) is labeled only once in the design.
Signal GP_C17_GBE_RGM2_MDC_GI_UART3_TXD_SIO_I2C0_SCL at (A 8) is labeled only once in the design.
Signal GP_A20_PSE_GBE1_RGM1_RXD2_AVS_I2S5_SFRM at (B 8) is labeled only once in the design.
Signal GP_A18_PSE_GBE1_RGM1_RXCTL at (B 8) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page7
Signal GP_R00_HDA_BCLK_AVS_I2S0_SCLK_PSE_I2S0_SCLK at (C 8) is labeled only once in the design.
Signal GP_R03_HDA_SDI0_AVS_I2S0_RXD_PSE_I2S0_RXD_DMIC_CLK_B1 at (C 8) is labeled only once in the design.
Signal GP_R02_HDA_SDO_AVS_I2S0_TXD_PSE_I2S0_TXD_DMIC_CLK_B0 at (C 8) is labeled only once in the design.
Signal GP_R05_HDA_SDI1_AVS_I2S1_RXD_DMIC_DATA1 at (C 8) is labeled only once in the design.
Signal GP_R01_HDA_SYNC_AVS_I2S0_SFRM_PSE_I2S0_SFRM at (B 8) is labeled only once in the design.
Signal GP_R04_HDA_RST_N_DMIC_CLK_A1 at (B 8) is labeled only once in the design.
Signal GP_R07_AVS_I2S1_SFRM_DMIC_DATA0 at (B 8) is labeled only once in the design.
Signal GP_R06_AVS_I2S1_TXD_DMIC_CLK_A0 at (B 8) is labeled only once in the design.
Signal GP_G19_AVS_I2S1_SCLK at (B 8) is labeled only once in the design.
Signal GP_F08_AVS_I2S_MCLK2_PSE_TRACEDATA_0_PSE_TGPIO48 at (B 8) is labeled only once in the design.
Signal GP_D19_AVS_I2S_MCLK1_PSE_TGPIO43 at (B 8) is labeled only once in the design.
Signal GP_F19_PSE_I2S1_RXD_AVS_I2S4_RXD_PSE_TGPIO17 at (B 8) is labeled only once in the design.
Signal GP_F18_PSE_I2S1_TXD_AVS_I2S4_TXD_PSE_TGPIO16 at (B 8) is labeled only once in the design.
Signal GP_F07_PSE_I2S1_SCLK_AVS_I2S4_SCLK_PSE_TGPIO14 at (B 8) is labeled only once in the design.
Signal GP_F10_PSE_I2S1_SFRM_AVS_I2S4_SFRM_PSE_TGPIO15 at (B 8) is labeled only once in the design.
Signal GP_G02_SD_SDIO_D1 at (C 1) is labeled only once in the design.
Signal GP_G01_SD_SDIO_D0 at (C 1) is labeled only once in the design.
Signal GP_G03_SD_SDIO_D2 at (B 1) is labeled only once in the design.
Signal GP_G06_SD_SDIO_CLK at (C 1) is labeled only once in the design.
Signal GP_G00_SD_SDIO_CMD at (C 1) is labeled only once in the design.
Signal GP_G23_SD_SDIO_WP at (B 1) is labeled only once in the design.
Signal GP_H17_SD_SDIO_PWR_EN_N at (B 1) is labeled only once in the design.
Signal GP_G05_SD_SDIO_CD_N at (B 1) is labeled only once in the design.
Signal GP_G11_AVS_I2S3_SCLK_DMIC_DATA0_PSE_TGPIO07 at (B 1) is labeled only once in the design.
Signal GP_E16_PSE_I2S0_TXD_PSE_CAN0_RX_PSE_TGPIO16 at (B 1) is labeled only once in the design.
Signal GP_E15_PSE_I2S0_RXD_PSE_CAN0_TX_PSE_TGPIO17 at (B 1) is labeled only once in the design.
Signal GP_E21_PSE_I2S0_SFRM_PSE_CAN1_RX_PSE_TGPIO15 at (B 1) is labeled only once in the design.
Signal GP_E20_PSE_I2S0_SCLK_PSE_CAN1_TX_PSE_TGPIO14 at (B 1) is labeled only once in the design.
Signal GP_G04_SD_SDIO_D3 at (B 1) is labeled only once in the design.
Signal GP_G13_AVS_I2S3_TXD_DMIC_CLK_B0_PSE_TGPIO08 at (B 1) is labeled only once in the design.
Signal GP_G12_AVS_I2S3_SFRM_SATA_1_GP_SATAXPCIE_1_DMIC_DATA1_PSE_TGPIO31 at (B 1) is labeled only once in the design.
Signal GP_G14_AVS_I2S3_RXD_DMIC_CLK_B1_PSE_TGPIO09 at (B 1) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page8
Signal PCIE_5_TXP_UFS_0_TXP1_PSE_GBE0_SGM0_TXP at (B 7) is labeled only once in the design.
Signal PCIE_4_RXP_UFS_0_RXP0 at (B 7) is labeled only once in the design.
Signal PCIE_0_RXN_USB3_2_RXN at (C 7) is labeled only once in the design.
Signal PCIE_1_TXP_USB3_3_TXP at (C 7) is labeled only once in the design.
Signal PCIE_1_RXP_USB3_3_RXP at (C 7) is labeled only once in the design.
Signal PCIE_4_TXN_UFS_0_TXN0 at (B 7) is labeled only once in the design.
Signal PCIE_4_RXN_UFS_0_RXN0 at (B 7) is labeled only once in the design.
Signal PCIE_6_RXP_UFS_1_RXP0_GBE_SGM2_RXP at (B 7) is labeled only once in the design.
Signal PCIE_6_TXN_UFS_1_TXN0_GBE_SGM2_TXN at (B 7) is labeled only once in the design.
Signal PCIE_5_RXN_UFS_0_RXN1_PSE_GBE0_SGM0_RXN at (B 7) is labeled only once in the design.
Signal      USB3_1_RXP at (C 7) is labeled only once in the design.
Signal      USB3_1_TXN at (C 7) is labeled only once in the design.
Signal      USB3_1_TXP at (C 7) is labeled only once in the design.
Signal      USB3_1_RXN at (C 7) is labeled only once in the design.
Signal PCIE_0_RXP_USB3_2_RXP at (C 7) is labeled only once in the design.
Signal PCIE_1_TXN_USB3_3_TXN at (C 7) is labeled only once in the design.
Signal PCIE_1_RXN_USB3_3_RXN at (C 7) is labeled only once in the design.
Signal      PCIE_2_TXP at (C 7) is labeled only once in the design.
Signal      PCIE_2_TXN at (C 7) is labeled only once in the design.
Signal      PCIE_2_RXP at (C 7) is labeled only once in the design.
Signal      PCIE_2_RXN at (C 7) is labeled only once in the design.
Signal      PCIE_3_TXP at (B 7) is labeled only once in the design.
Signal      PCIE_3_TXN at (B 7) is labeled only once in the design.
Signal      PCIE_3_RXP at (B 7) is labeled only once in the design.
Signal      PCIE_3_RXN at (B 7) is labeled only once in the design.
Signal PCIE_4_TXP_UFS_0_TXP0 at (B 7) is labeled only once in the design.
Signal PCIE_6_TXP_UFS_1_TXP0_GBE_SGM2_TXP at (B 7) is labeled only once in the design.
Signal PCIE_9_RXP_SATA_1_RXP_PSE_GBE1_SGM1_RXP at (A 7) is labeled only once in the design.
Signal PCIE_9_TXN_SATA_1_TXN_PSE_GBE1_SGM1_TXN at (A 7) is labeled only once in the design.
Signal PCIE_9_TXP_SATA_1_TXP_PSE_GBE1_SGM1_TXP at (A 7) is labeled only once in the design.
Signal PCIE_6_RXN_UFS_1_RXN0_GBE_SGM2_RXN at (B 7) is labeled only once in the design.
Signal PCIE_7_TXP_UFS_1_TXP1_PSE_GBE1_SGM1_TXP at (B 7) is labeled only once in the design.
Signal PCIE_8_TXN_SATA_0_TXN_GBE_SGM2_TXN at (A 7) is labeled only once in the design.
Signal PCIE_8_RXP_SATA_0_RXP_GBE_SGM2_RXP at (A 7) is labeled only once in the design.
Signal PCIE_8_RXN_SATA_0_RXN_GBE_SGM2_RXN at (A 7) is labeled only once in the design.
Signal PCIE_7_RXP_UFS_1_RXP1_PSE_GBE1_SGM1_RXP at (B 7) is labeled only once in the design.
Signal PCIE_8_TXP_SATA_0_TXP_GBE_SGM2_TXP at (A 7) is labeled only once in the design.
Signal PCIE_7_RXN_UFS_1_RXN1_PSE_GBE1_SGM1_RXN at (A 7) is labeled only once in the design.
Signal PCIE_7_TXN_UFS_1_TXN1_PSE_GBE1_SGM1_TXN at (B 7) is labeled only once in the design.
Signal PCIE_9_RXN_SATA_1_RXN_PSE_GBE1_SGM1_RXN at (A 7) is labeled only once in the design.
Signal PCIE_5_TXN_UFS_0_TXN1_PSE_GBE0_SGM0_TXN at (B 7) is labeled only once in the design.
Signal PCIE_5_RXP_UFS_0_RXP1_PSE_GBE0_SGM0_RXP at (B 7) is labeled only once in the design.
Signal      USB3_0_TXP at (D 7) is labeled only once in the design.
Signal      USB3_0_RXN at (C 7) is labeled only once in the design.
Signal      USB3_0_RXP at (C 7) is labeled only once in the design.
Signal      USB3_0_TXN at (D 7) is labeled only once in the design.
Signal         USB2_1N at (C 1) is labeled only once in the design.
Signal         USB2_2N at (C 1) is labeled only once in the design.
Signal         USB2_2P at (C 1) is labeled only once in the design.
Signal         USB2_7P at (C 1) is labeled only once in the design.
Signal         USB2_8P at (B 1) is labeled only once in the design.
Signal         USB2_5N at (C 1) is labeled only once in the design.
Signal         USB2_8N at (B 1) is labeled only once in the design.
Signal GP_E09_USB2_OC0_N at (B 1) is labeled only once in the design.
Signal GP_T08_USB2_OC2_N_PSE_TGPIO22 at (B 1) is labeled only once in the design.
Signal      USB2_RCOMP at (A 1) is labeled only once in the design.
Signal     HSIO_RCOMPP at (A 1) is labeled only once in the design.
Signal     HSIO_RCOMPN at (A 1) is labeled only once in the design.
Signal         USB2_9P at (B 1) is labeled only once in the design.
Signal         USB2_9N at (B 1) is labeled only once in the design.
Signal         USB2_6N at (C 1) is labeled only once in the design.
Signal         USB2_4N at (C 1) is labeled only once in the design.
Signal         USB2_3N at (C 1) is labeled only once in the design.
Signal         USB2_3P at (C 1) is labeled only once in the design.
Signal         USB2_4P at (C 1) is labeled only once in the design.
Signal         USB2_5P at (C 1) is labeled only once in the design.
Signal         USB2_6P at (C 1) is labeled only once in the design.
Signal         USB2_7N at (C 1) is labeled only once in the design.
Signal GP_C08_PSE_TGPIO04_DNX_FORCE_RELOAD at (B 1) is labeled only once in the design.
Signal GP_E04_SATA_0_DEVSLP_PSE_PWM08_PSE_TGPIO44 at (B 1) is labeled only once in the design.
Signal GP_T11_USB2_OC3_N_PSE_TGPIO06 at (B 1) is labeled only once in the design.
Signal GP_E00_SATA_LED_N_SATAXPCIE_0_SATA_0_GP at (B 1) is labeled only once in the design.
Signal GP_E08_SATA_1_DEVSLP_TSPI_CS1_N_PSE_TGPIO45 at (B 1) is labeled only once in the design.
Signal GP_H14_M2_SKT2_CFG2_PSE_TGPIO53 at (B 1) is labeled only once in the design.
Signal     UFS_RESET_N at (B 1) is labeled only once in the design.
Signal         USB2_0P at (D 1) is labeled only once in the design.
Signal         USB2_0N at (C 1) is labeled only once in the design.
Signal         USB2_1P at (C 1) is labeled only once in the design.
Signal PCIE_0_TXN_USB3_2_TXN at (C 7) is labeled only once in the design.
Signal PCIE_0_TXP_USB3_2_TXP at (C 7) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page9
Signal    PCIE_CLK0_DN at (B 7) is labeled only once in the design.
Signal PCIE_CLK4_N_UFS_REF_CLK_1 at (C 7) is labeled only once in the design.
Signal PCIE_CLK4_P_UFS_REF_CLK_0 at (C 7) is labeled only once in the design.
Signal    PCIE_CLK5_DP at (C 7) is labeled only once in the design.
Signal    PCIE_CLK5_DN at (C 7) is labeled only once in the design.
Signal    PCIE_CLK0_DP at (B 7) is labeled only once in the design.
Signal    PCIE_CLK1_DN at (B 7) is labeled only once in the design.
Signal GP_S00_UFS_0_CLK at (B 7) is labeled only once in the design.
Signal GP_S01_UFS_1_CLK at (B 7) is labeled only once in the design.
Signal         XTAL_IN at (B 7) is labeled only once in the design.
Signal        XTAL_OUT at (B 7) is labeled only once in the design.
Signal    PCIE_CLK1_DP at (B 7) is labeled only once in the design.
Signal    PCIE_CLK2_DN at (B 7) is labeled only once in the design.
Signal    PCIE_CLK2_DP at (B 7) is labeled only once in the design.
Signal    PCIE_CLK3_DN at (C 7) is labeled only once in the design.
Signal    PCIE_CLK3_DP at (C 7) is labeled only once in the design.
Signal GP_H10_PCIE_CLKREQ4_N_PSE_PWM14 at (C 2) is labeled only once in the design.
Signal GP_D05_PCIE_CLKREQ0_N at (C 2) is labeled only once in the design.
Signal GP_H11_PCIE_CLKREQ5_N_PSE_PWM15 at (C 2) is labeled only once in the design.
Signal GP_D08_PCIE_CLKREQ3_N at (C 2) is labeled only once in the design.
Signal GP_D07_PCIE_CLKREQ2_N at (C 2) is labeled only once in the design.
Signal GP_D06_PCIE_CLKREQ1_N at (C 2) is labeled only once in the design.
Signal          RTC_X2 at (B 2) is labeled only once in the design.
Signal       RTC_RST_N at (B 2) is labeled only once in the design.
Signal    ICLK_BIASREF at (B 2) is labeled only once in the design.
Signal      RTC_TEST_N at (B 2) is labeled only once in the design.
Signal          RTC_X1 at (B 2) is labeled only once in the design.
Signal GP_DSW08_PMC_SUSCLK at (B 2) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page10
Signal      CNV_WT_D0N at (C 8) is labeled only once in the design.
Signal     CNV_WT_CLKP at (C 8) is labeled only once in the design.
Signal      CNV_WT_D1P at (C 8) is labeled only once in the design.
Signal     CNV_WR_CLKN at (C 8) is labeled only once in the design.
Signal     CNV_WT_CLKN at (C 8) is labeled only once in the design.
Signal      CNV_WT_D0P at (C 8) is labeled only once in the design.
Signal      CNV_WT_D1N at (C 8) is labeled only once in the design.
Signal     CNV_WR_CLKP at (C 8) is labeled only once in the design.
Signal GP_G08_AVS_I2S2_SFRM_CNV_RF_RESET_N_DMIC_DATA0 at (B 8) is labeled only once in the design.
Signal GP_V15_PSE_TGPIO03 at (B 8) is labeled only once in the design.
Signal GP_V14_PSE_TGPIO02 at (B 8) is labeled only once in the design.
Signal GP_V12_PSE_TGPIO00 at (B 8) is labeled only once in the design.
Signal    CNV_WT_RCOMP at (B 8) is labeled only once in the design.
Signal GP_G07_AVS_I2S2_SCLK_DMIC_CLK_A0 at (B 8) is labeled only once in the design.
Signal GP_G10_AVS_I2S2_RXD_DMIC_DATA1 at (B 8) is labeled only once in the design.
Signal GP_V13_PSE_TGPIO01 at (B 8) is labeled only once in the design.
Signal GP_F04_CNV_RF_RESET_N at (B 8) is labeled only once in the design.
Signal      CNV_WR_D1P at (C 8) is labeled only once in the design.
Signal      CNV_WR_D0N at (C 8) is labeled only once in the design.
Signal      CNV_WR_D0P at (C 8) is labeled only once in the design.
Signal      CNV_WR_D1N at (B 8) is labeled only once in the design.
Signal GP_G09_AVS_I2S2_TXD_MODEM_CLKREQ_CRF_XTAL_CLKREQ_DMIC_CLK_A1 at (B 8) is labeled only once in the design.
Signal GP_F06_CNV_PA_BLANKING_PSE_TGPIO47 at (B 2) is labeled only once in the design.
Signal GP_F01_CNV_BRI_RSP_SIO_UART0_RXD at (B 2) is labeled only once in the design.
Signal GP_V09_EMMC_RCLK at (C 2) is labeled only once in the design.
Signal GP_V08_EMMC_DATA7 at (C 2) is labeled only once in the design.
Signal GP_F00_CNV_BRI_DT_SIO_UART0_RTS_N at (B 2) is labeled only once in the design.
Signal GP_V02_EMMC_DATA1 at (C 2) is labeled only once in the design.
Signal GP_V06_EMMC_DATA5 at (C 2) is labeled only once in the design.
Signal GP_V11_EMMC_RST_N at (C 2) is labeled only once in the design.
Signal GP_V04_EMMC_DATA3 at (C 2) is labeled only once in the design.
Signal GP_V10_EMMC_CLK at (C 2) is labeled only once in the design.
Signal GP_V01_EMMC_DATA0 at (C 2) is labeled only once in the design.
Signal GP_V03_EMMC_DATA2 at (C 2) is labeled only once in the design.
Signal GP_V05_EMMC_DATA4 at (C 2) is labeled only once in the design.
Signal GP_V07_EMMC_DATA6 at (C 2) is labeled only once in the design.
Signal GP_V00_EMMC_CMD at (C 2) is labeled only once in the design.
Signal      EMMC_RCOMP at (B 2) is labeled only once in the design.
Signal GP_F02_CNV_RPSE_DT_SIO_UART0_TXD at (B 2) is labeled only once in the design.
Signal GP_F03_CNV_RPSE_RSP_SIO_UART0_CTS_N at (B 2) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page11
Signal GP_DSW09_PMC_SLP_WLAN_N at (D 8) is labeled only once in the design.
Signal GP_B12_PMC_SLP_S0_N at (D 8) is labeled only once in the design.
Signal   PMC_SYS_PWROK at (C 8) is labeled only once in the design.
Signal     PROC_PWR_GD at (C 8) is labeled only once in the design.
Signal   PMC_DSW_PWROK at (C 8) is labeled only once in the design.
Signal GP_DSW03_PMC_PWRBTN_N at (C 8) is labeled only once in the design.
Signal GP_DSW04_PMC_SLP_S3_N at (D 8) is labeled only once in the design.
Signal   PMC_PCH_PWROK at (C 8) is labeled only once in the design.
Signal      INTRUDER_N at (C 8) is labeled only once in the design.
Signal   BUF_PLT_RST_N at (A 6) is labeled only once in the design.
Signal     PM_SYSRST_N at (C 5) is labeled only once in the design.
Signal   PMC_SLP_SUS_N at (D 8) is labeled only once in the design.
Signal GP_DSW10_PMC_SLP_S5_N at (D 8) is labeled only once in the design.
Signal GP_DSW05_PMC_SLP_S4_N at (D 8) is labeled only once in the design.
Signal GP_F23_PMC_V1P05_CTRL at (C 4) is labeled only once in the design.
Signal        GP_DSW11 at (C 4) is labeled only once in the design.
Signal GP_H16_PCIE_LNK_DOWN_DDI2_DDC_SCL at (C 4) is labeled only once in the design.
Signal GP_F09_BOOT_PWR_EN at (D 4) is labeled only once in the design.
Signal          GP_F20 at (D 4) is labeled only once in the design.
Signal        GP_DSW02 at (D 4) is labeled only once in the design.
Signal GP_H18_PMC_CPU_C10_GATEB at (D 4) is labeled only once in the design.
Signal        GP_DSW07 at (D 4) is labeled only once in the design.
Signal          GP_F21 at (D 4) is labeled only once in the design.
Signal GP_F22_PMC_VNN_CTRL at (C 4) is labeled only once in the design.
Signal  VCCST_OVERRIDE at (C 4) is labeled only once in the design.
Signal     VCCST_PWRGD at (C 4) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page12
Signal    SVID_ALERT_N at (A 7) is labeled only once in the design.
Signal       SVID_DATA at (A 7) is labeled only once in the design.
Signal        SVID_CLK at (B 7) is labeled only once in the design.
Signal     VSSIN_SENSE at (A 3) is labeled only once in the design.
Signal     VCCIN_SENSE at (A 3) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page13
Signal     VCCIO_SENSE at (C 4) is labeled only once in the design.
Signal     VSSIO_SENSE at (C 4) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page14
Signal GP_B01_PMC_CORE_VID1 at (B 7) is labeled only once in the design.
Signal GP_B00_PMC_CORE_VID0 at (B 7) is labeled only once in the design.
Signal VCCIN_AUX_VSSSENSE at (B 7) is labeled only once in the design.
Signal VCCIN_AUX_VCCSENSE at (B 7) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i9@ehl_mcl_lib.soc(sch_1):Page17
Signal       DBG_PMODE at (B 7) is labeled only once in the design.
Signal          NOA_13 at (C 6) is labeled only once in the design.
Signal          NOA_00 at (C 6) is labeled only once in the design.
Signal          NOA_01 at (C 6) is labeled only once in the design.
Signal          NOA_02 at (C 6) is labeled only once in the design.
Signal          NOA_03 at (C 6) is labeled only once in the design.
Signal          NOA_04 at (C 6) is labeled only once in the design.
Signal          NOA_05 at (C 6) is labeled only once in the design.
Signal          NOA_06 at (C 6) is labeled only once in the design.
Signal          NOA_12 at (C 6) is labeled only once in the design.
Signal          NOA_18 at (C 6) is labeled only once in the design.
Signal          NOA_11 at (C 6) is labeled only once in the design.
Signal          NOA_19 at (C 6) is labeled only once in the design.
Signal       NOA_RCOMP at (B 6) is labeled only once in the design.
Signal          NOA_17 at (C 6) is labeled only once in the design.
Signal          NOA_16 at (C 6) is labeled only once in the design.
Signal          NOA_15 at (C 6) is labeled only once in the design.
Signal          NOA_14 at (C 6) is labeled only once in the design.
Signal          NOA_10 at (C 6) is labeled only once in the design.
Signal          NOA_09 at (C 6) is labeled only once in the design.
Signal          NOA_08 at (C 6) is labeled only once in the design.
Signal          NOA_07 at (C 6) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i13@ehl_mcl_lib.ufs(sch_1):Page1
Signal PCIE_7_RXP_UFS_1_RXP1_PSE_GBE1_SGM1_RXP at (C 8) is labeled only once in the design.
Signal PCIE_7_RXN_UFS_1_RXN1_PSE_GBE1_SGM1_RXN at (C 8) is labeled only once in the design.
Signal GP_S01_UFS_1_CLK at (A 6) is labeled only once in the design.
Signal PCIE_6_RXN_UFS_1_RXN0_GBE_SGM2_RXN at (D 8) is labeled only once in the design.
Signal PCIE_6_TXP_UFS_1_TXP0_GBE_SGM2_TXP at (D 8) is labeled only once in the design.
Signal PCIE_6_TXN_UFS_1_TXN0_GBE_SGM2_TXN at (D 8) is labeled only once in the design.
Signal PCIE_6_RXP_UFS_1_RXP0_GBE_SGM2_RXP at (D 8) is labeled only once in the design.
Signal     UFS_RESET_N at (D 8) is labeled only once in the design.
Signal PCIE_7_TXP_UFS_1_TXP1_PSE_GBE1_SGM1_TXP at (D 8) is labeled only once in the design.
Signal PCIE_7_TXN_UFS_1_TXN1_PSE_GBE1_SGM1_TXN at (C 8) is labeled only once in the design.
Signal UFS_REF_CLK_1_R at (A 5) is labeled only once in the design.
Signal PCIE_CLK4_N_UFS_REF_CLK_1 at (A 6) is labeled only once in the design.
Signal       VDDIQ_UFS at (C 3) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i14@ehl_mcl_lib.ports_1(sch_1):Page1
Signal      CNV_WT_D1N at (A 8) is labeled only once in the design.
Signal     CNV_WT_CLKN at (B 8) is labeled only once in the design.
Signal     CNV_WT_CLKP at (B 8) is labeled only once in the design.
Signal      CNV_WT_D0N at (A 8) is labeled only once in the design.
Signal      CNV_WT_D0P at (A 8) is labeled only once in the design.
Signal      CNV_WT_D1P at (A 8) is labeled only once in the design.
Signal      CNV_WR_D0P at (A 8) is labeled only once in the design.
Signal      CNV_WR_D0N at (A 8) is labeled only once in the design.
Signal     CNV_WR_CLKP at (B 8) is labeled only once in the design.
Signal     CNV_WR_CLKN at (B 8) is labeled only once in the design.
Signal GP_G00_SD_SDIO_CMD at (D 8) is labeled only once in the design.
Signal GP_G01_SD_SDIO_D0 at (D 8) is labeled only once in the design.
Signal GP_G02_SD_SDIO_D1 at (D 8) is labeled only once in the design.
Signal GP_G03_SD_SDIO_D2 at (D 8) is labeled only once in the design.
Signal GP_G23_SD_SDIO_WP at (C 8) is labeled only once in the design.
Signal GP_H17_SD_SDIO_PWR_EN_N at (C 8) is labeled only once in the design.
Signal GP_G05_SD_SDIO_CD_N at (C 8) is labeled only once in the design.
Signal GP_G04_SD_SDIO_D3 at (D 8) is labeled only once in the design.
Signal      CNV_WR_D1P at (A 8) is labeled only once in the design.
Signal      CNV_WR_D1N at (A 8) is labeled only once in the design.
Signal    SD_SDIO_CD_N at (C 6) is labeled only once in the design.
Signal      SD_SDIO_WP at (C 6) is labeled only once in the design.
Signal SD_SDIO_PWR_EN_N at (C 6) is labeled only once in the design.
Signal      SD_SDIO_D0 at (C 6) is labeled only once in the design.
Signal      SD_SDIO_D1 at (C 6) is labeled only once in the design.
Signal      SD_SDIO_D2 at (C 6) is labeled only once in the design.
Signal      SD_SDIO_D3 at (C 6) is labeled only once in the design.
Signal     SD_SDIO_CMD at (C 6) is labeled only once in the design.
Signal     SD_SDIO_CLK at (C 6) is labeled only once in the design.
Signal          GP_G02 at (D 6) is labeled only once in the design.
Signal          GP_G03 at (D 6) is labeled only once in the design.
Signal          GP_G04 at (D 6) is labeled only once in the design.
Signal          GP_G05 at (C 6) is labeled only once in the design.
Signal          GP_G23 at (C 6) is labeled only once in the design.
Signal          GP_H17 at (C 6) is labeled only once in the design.
Signal          GP_G01 at (D 6) is labeled only once in the design.
Signal          GP_G00 at (D 6) is labeled only once in the design.
Signal GP_G06_SD_SDIO_CLK at (D 8) is labeled only once in the design.
Signal          GP_G06 at (D 6) is labeled only once in the design.
Signal GP_F00_CNV_BRI_DT_SIO_UART0_RTS_N\G at (D 5) is labeled only once in the design.
Signal GP_F02_CNV_RPSE_DT_SIO_UART0_TXD\G at (D 5) is labeled only once in the design.
Signal GP_F06_CNV_PA_BLANKING_PSE_TGPIO47\G at (C 5) is labeled only once in the design.
Signal GP_F03_CNV_RPSE_RSP_SIO_UART0_CTS_N\G at (D 5) is labeled only once in the design.
Signal GP_F01_CNV_BRI_RSP_SIO_UART0_RXD\G at (D 5) is labeled only once in the design.
Signal      CNV_BRI_DT at (D 1) is labeled only once in the design.
Signal     CNV_BRI_RSP at (D 1) is labeled only once in the design.
Signal     CNV_RPSE_DT at (C 1) is labeled only once in the design.
Signal    CNV_RPSE_RSP at (C 1) is labeled only once in the design.
Signal     PSE_TGPIO47 at (B 1) is labeled only once in the design.
Signal CNV_PA_BLANKING at (B 1) is labeled only once in the design.
Signal          GP_F06 at (C 1) is labeled only once in the design.
Signal SIO_UART0_RXD_A at (C 1) is labeled only once in the design.
Signal SIO_UART0_TXD_A at (C 1) is labeled only once in the design.
Signal SIO_UART0_RTS_N_A at (C 1) is labeled only once in the design.
Signal SIO_UART0_CTS_N_A at (C 1) is labeled only once in the design.
Signal GP_F02_CNV_RPSE_DT_SIO_UART0_TXD_R\G at (D 4) is labeled only once in the design.
Signal GP_F00_CNV_BRI_DT_SIO_UART0_RTS_N_R\G at (D 4) is labeled only once in the design.
Signal          GP_F01 at (D 1) is labeled only once in the design.
Signal          GP_F02 at (D 1) is labeled only once in the design.
Signal          GP_F00 at (D 1) is labeled only once in the design.
Signal          GP_F03 at (D 1) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i15@ehl_mcl_lib.ports_2(sch_1):Page1
Signal         USB2_1P at (C 7) is labeled only once in the design.
Signal GP_E09_USB2_OC0_N at (A 7) is labeled only once in the design.
Signal GP_T08_USB2_OC2_N_PSE_TGPIO22\G at (A 7) is labeled only once in the design.
Signal         USB2_1N at (C 7) is labeled only once in the design.
Signal         USB2_2P at (C 7) is labeled only once in the design.
Signal         USB2_2N at (C 7) is labeled only once in the design.
Signal         USB2_3P at (C 7) is labeled only once in the design.
Signal         USB2_3N at (C 7) is labeled only once in the design.
Signal         USB2_4N at (C 7) is labeled only once in the design.
Signal         USB2_4P at (C 7) is labeled only once in the design.
Signal         USB2_5P at (C 7) is labeled only once in the design.
Signal         USB2_5N at (C 7) is labeled only once in the design.
Signal         USB2_6N at (C 7) is labeled only once in the design.
Signal         USB2_6P at (C 7) is labeled only once in the design.
Signal         USB2_7P at (C 7) is labeled only once in the design.
Signal         USB2_7N at (C 7) is labeled only once in the design.
Signal         USB2_8P at (C 7) is labeled only once in the design.
Signal         USB2_8N at (B 7) is labeled only once in the design.
Signal         USB2_9P at (B 7) is labeled only once in the design.
Signal         USB2_9N at (B 7) is labeled only once in the design.
Signal        USB2_OC3 at (A 4) is labeled only once in the design.
Signal          GP_T11 at (A 4) is labeled only once in the design.
Signal          GP_E09 at (A 4) is labeled only once in the design.
Signal      USB2_OC0_N at (A 4) is labeled only once in the design.
Signal     PSE_TGPIO22 at (A 4) is labeled only once in the design.
Signal        USB2_OC2 at (A 4) is labeled only once in the design.
Signal          GP_T08 at (A 4) is labeled only once in the design.
Signal   PSE_TGPIO06_C at (A 4) is labeled only once in the design.
Signal         USB2_0P at (D 7) is labeled only once in the design.
Signal         USB2_0N at (D 7) is labeled only once in the design.
Signal GP_T11_USB2_OC3_N_PSE_TGPIO06\G at (A 7) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i16@ehl_mcl_lib.ports_3(sch_1):Page1
Signal        GP_DSW02 at (A 7) is labeled only once in the design.
Signal      PMC_WAKE_N at (A 7) is labeled only once in the design.
Signal      INTRUDER_N at (B 7) is labeled only once in the design.
Signal    H_THRMTRIP_N at (B 7) is labeled only once in the design.
Signal     VCCST_PWRGD at (A 7) is labeled only once in the design.
Signal  VCCST_OVERRIDE at (A 7) is labeled only once in the design.
Signal        CATERR_N at (B 7) is labeled only once in the design.
Signal     H_PROCHOT_N at (B 7) is labeled only once in the design.
Signal        BPM1_N_R at (C 7) is labeled only once in the design.
Signal        BPM2_N_R at (C 7) is labeled only once in the design.
Signal        BPM3_N_R at (C 7) is labeled only once in the design.
Signal     JTAG_PRDY_N at (C 7) is labeled only once in the design.
Signal   JTAG_TRST_N_R at (C 7) is labeled only once in the design.
Signal      JTAG_TDI_R at (C 7) is labeled only once in the design.
Signal  PCH_JTAG_TCK_R at (C 7) is labeled only once in the design.
Signal     JTAG_PREQ_N at (C 7) is labeled only once in the design.
Signal      JTAG_TMS_R at (C 7) is labeled only once in the design.
Signal      JTAG_TDO_R at (C 7) is labeled only once in the design.
Signal        BPM0_N_R at (C 7) is labeled only once in the design.
Signal      JTAG_TCK_R at (D 7) is labeled only once in the design.
Signal GP_H16_PCIE_LNK_DOWN_DDI2_DDC_SCL at (B 4) is labeled only once in the design.
Signal GP_H18_PMC_CPU_C10_GATEB at (C 4) is labeled only once in the design.
Signal GP_DSW00_PMC_BATLOW_N at (C 4) is labeled only once in the design.
Signal GP_DSW01_PMC_ACPRESENT at (C 4) is labeled only once in the design.
Signal GP_B13_PMC_PLTRST_N at (C 4) is labeled only once in the design.
Signal GP_DSW09_PMC_SLP_WLAN_N at (C 4) is labeled only once in the design.
Signal GP_DSW04_PMC_SLP_S3_N at (C 4) is labeled only once in the design.
Signal GP_DSW05_PMC_SLP_S4_N at (C 4) is labeled only once in the design.
Signal GP_DSW10_PMC_SLP_S5_N at (D 4) is labeled only once in the design.
Signal        GP_DSW11 at (C 4) is labeled only once in the design.
Signal          GP_F20 at (C 4) is labeled only once in the design.
Signal        GP_DSW07 at (C 4) is labeled only once in the design.
Signal          GP_F21 at (C 4) is labeled only once in the design.
Signal GP_F09_BOOT_PWR_EN at (C 4) is labeled only once in the design.
Signal GP_F23_PMC_V1P05_CTRL at (C 4) is labeled only once in the design.
Signal GP_F22_PMC_VNN_CTRL at (C 4) is labeled only once in the design.
Signal    DDI2_DDC_SCL at (A 2) is labeled only once in the design.
Signal   PCIE_LNK_DOWN at (A 2) is labeled only once in the design.
Signal          GP_H16 at (B 2) is labeled only once in the design.
Signal GP_B12_PMC_SLP_S0_N at (C 4) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i17@ehl_mcl_lib.ports_4(sch_1):Page1
Signal GP_D19_AVS_I2S_MCLK1_PSE_TGPIO43 at (B 8) is labeled only once in the design.
Signal GP_F08_AVS_I2S_MCLK2_PSE_TRACEDATA_0_PSE_TGPIO48 at (B 8) is labeled only once in the design.
Signal   AVS_I2S_MCLK2 at (B 5) is labeled only once in the design.
Signal   AVS_I2S_MCLK1 at (B 5) is labeled only once in the design.
Signal     PSE_TGPIO48 at (A 5) is labeled only once in the design.
Signal PSE_TRACEDATA_0 at (A 5) is labeled only once in the design.
Signal     PSE_TGPIO43 at (A 5) is labeled only once in the design.
Signal     PSE_TGPIO16 at (B 5) is labeled only once in the design.
Signal     PSE_TGPIO17 at (B 5) is labeled only once in the design.
Signal     PSE_TGPIO15 at (B 5) is labeled only once in the design.
Signal     PSE_TGPIO14 at (B 5) is labeled only once in the design.
Signal          GP_F08 at (B 5) is labeled only once in the design.
Signal          GP_D19 at (B 5) is labeled only once in the design.
Signal    PSE_I2S1_TXD at (C 5) is labeled only once in the design.
Signal    PSE_I2S1_RXD at (C 5) is labeled only once in the design.
Signal          GP_F10 at (C 5) is labeled only once in the design.
Signal   PSE_I2S1_SCLK at (C 5) is labeled only once in the design.
Signal   PSE_I2S1_SFRM at (C 5) is labeled only once in the design.
Signal AVS_I2S4_SFRM_A at (C 5) is labeled only once in the design.
Signal  AVS_I2S4_RXD_A at (C 5) is labeled only once in the design.
Signal  AVS_I2S4_TXD_A at (C 5) is labeled only once in the design.
Signal AVS_I2S4_SCLK_A at (C 5) is labeled only once in the design.
Signal GP_F07_PSE_I2S1_SCLK_AVS_I2S4_SCLK_PSE_TGPIO14\G at (C 8) is labeled only once in the design.
Signal          GP_F18 at (C 5) is labeled only once in the design.
Signal          GP_F07 at (C 5) is labeled only once in the design.
Signal          GP_F19 at (C 5) is labeled only once in the design.
Signal GP_V07_EMMC_DATA6 at (B 4) is labeled only once in the design.
Signal GP_V08_EMMC_DATA7 at (A 4) is labeled only once in the design.
Signal GP_V00_EMMC_CMD at (A 4) is labeled only once in the design.
Signal GP_V11_EMMC_RST_N at (A 4) is labeled only once in the design.
Signal GP_V05_EMMC_DATA4 at (B 4) is labeled only once in the design.
Signal GP_V06_EMMC_DATA5 at (B 4) is labeled only once in the design.
Signal GP_V02_EMMC_DATA1 at (B 4) is labeled only once in the design.
Signal GP_V03_EMMC_DATA2 at (B 4) is labeled only once in the design.
Signal GP_V04_EMMC_DATA3 at (B 4) is labeled only once in the design.
Signal GP_V09_EMMC_RCLK at (B 4) is labeled only once in the design.
Signal GP_V01_EMMC_DATA0 at (B 4) is labeled only once in the design.
Signal GP_V10_EMMC_CLK at (B 4) is labeled only once in the design.
Signal      EMMC_DATA1 at (A 1) is labeled only once in the design.
Signal      EMMC_DATA2 at (A 1) is labeled only once in the design.
Signal      EMMC_DATA3 at (A 1) is labeled only once in the design.
Signal      EMMC_DATA6 at (A 1) is labeled only once in the design.
Signal      EMMC_DATA7 at (A 1) is labeled only once in the design.
Signal        EMMC_CMD at (A 1) is labeled only once in the design.
Signal      EMMC_DATA4 at (A 1) is labeled only once in the design.
Signal      EMMC_DATA5 at (A 1) is labeled only once in the design.
Signal          GP_V08 at (A 1) is labeled only once in the design.
Signal          GP_V07 at (B 1) is labeled only once in the design.
Signal          GP_V05 at (B 1) is labeled only once in the design.
Signal          GP_V06 at (B 1) is labeled only once in the design.
Signal        EMMC_CLK at (A 1) is labeled only once in the design.
Signal       EMMC_RCLK at (A 1) is labeled only once in the design.
Signal      EMMC_DATA0 at (A 1) is labeled only once in the design.
Signal      EMMC_RST_N at (A 1) is labeled only once in the design.
Signal          GP_V00 at (A 1) is labeled only once in the design.
Signal          GP_V11 at (A 1) is labeled only once in the design.
Signal     PSE_TGPIO44 at (B 1) is labeled only once in the design.
Signal     PSE_TGPIO45 at (B 1) is labeled only once in the design.
Signal     SATAXPCIE_0 at (C 1) is labeled only once in the design.
Signal   SATA_1_DEVSLP at (C 1) is labeled only once in the design.
Signal      SATA_LED_N at (C 1) is labeled only once in the design.
Signal   SATA_0_DEVSLP at (C 1) is labeled only once in the design.
Signal          GP_V04 at (B 1) is labeled only once in the design.
Signal          GP_V03 at (B 1) is labeled only once in the design.
Signal          GP_V02 at (B 1) is labeled only once in the design.
Signal          GP_V01 at (B 1) is labeled only once in the design.
Signal          GP_V09 at (B 1) is labeled only once in the design.
Signal          GP_V10 at (B 1) is labeled only once in the design.
Signal       SATA_0_GP at (B 1) is labeled only once in the design.
Signal      TSPI_CS1_N at (C 1) is labeled only once in the design.
Signal     PSE_PWM08_A at (C 1) is labeled only once in the design.
Signal GP_E00_SATA_LED_N_SATAXPCIE_0_SATA_0_GP at (C 4) is labeled only once in the design.
Signal GP_E04_SATA_0_DEVSLP_PSE_PWM08_PSE_TGPIO44 at (C 4) is labeled only once in the design.
Signal GP_E08_SATA_1_DEVSLP_TSPI_CS1_N_PSE_TGPIO45 at (C 4) is labeled only once in the design.
Signal          GP_E08 at (C 1) is labeled only once in the design.
Signal          GP_E04 at (C 1) is labeled only once in the design.
Signal          GP_E00 at (C 1) is labeled only once in the design.
Signal GP_F10_PSE_I2S1_SFRM_AVS_I2S4_SFRM_PSE_TGPIO15\G at (C 8) is labeled only once in the design.
Signal GP_F19_PSE_I2S1_RXD_AVS_I2S4_RXD_PSE_TGPIO17\G at (C 8) is labeled only once in the design.
Signal GP_F18_PSE_I2S1_TXD_AVS_I2S4_TXD_PSE_TGPIO16\G at (C 8) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i18@ehl_mcl_lib.ports_5(sch_1):Page1
Signal       DDI2_TXP3 at (B 8) is labeled only once in the design.
Signal       PNL_VDDEN at (A 8) is labeled only once in the design.
Signal       DDI1_TXP2 at (C 8) is labeled only once in the design.
Signal       DDI1_TXN2 at (C 8) is labeled only once in the design.
Signal       DDI1_TXN3 at (C 8) is labeled only once in the design.
Signal       DDI1_TXP3 at (C 8) is labeled only once in the design.
Signal       DDI1_TXP1 at (C 8) is labeled only once in the design.
Signal       DDI2_TXN0 at (B 8) is labeled only once in the design.
Signal       DDI2_TXP1 at (B 8) is labeled only once in the design.
Signal       DDI1_TXP0 at (C 8) is labeled only once in the design.
Signal     PNL_BKLTCTL at (A 8) is labeled only once in the design.
Signal      PNL_BKLTEN at (A 8) is labeled only once in the design.
Signal    MDSI_DE_TE_2 at (A 8) is labeled only once in the design.
Signal EDP_UTILS_MDSI_DE_TE_1 at (A 8) is labeled only once in the design.
Signal       DDI0_AUXN at (C 8) is labeled only once in the design.
Signal       DDI2_AUXN at (A 8) is labeled only once in the design.
Signal       DDI1_AUXP at (B 8) is labeled only once in the design.
Signal       DDI1_AUXN at (B 8) is labeled only once in the design.
Signal       DDI1_TXN0 at (C 8) is labeled only once in the design.
Signal       DDI1_TXN1 at (C 8) is labeled only once in the design.
Signal       DDI0_TXN2 at (D 8) is labeled only once in the design.
Signal       DDI0_TXP3 at (D 8) is labeled only once in the design.
Signal       DDI0_TXN3 at (D 8) is labeled only once in the design.
Signal       DDI0_TXP2 at (D 8) is labeled only once in the design.
Signal       DDI0_TXP1 at (D 8) is labeled only once in the design.
Signal       DDI0_TXN0 at (D 8) is labeled only once in the design.
Signal       DDI0_TXP0 at (D 8) is labeled only once in the design.
Signal       DDI0_TXN1 at (D 8) is labeled only once in the design.
Signal GP_E07_DDI1_DDC_SCL_CPU_GP1_PSE_TGPIO16\G at (C 6) is labeled only once in the design.
Signal GP_E05_DDI1_DDC_SDA_PSE_PWM09_PSE_TGPIO17\G at (C 6) is labeled only once in the design.
Signal GP_E22_PNL1_BKLTCTL_PSE_PWM14_PSE_TGPIO18\G at (B 6) is labeled only once in the design.
Signal GP_E17_PNL1_VDDEN_PNL_MISC_DDI2_PSE_PWM11_PSE_TGPIO46\G at (B 6) is labeled only once in the design.
Signal    DDI1_DDC_SCL at (C 2) is labeled only once in the design.
Signal     PNL1_BKLTEN at (A 2) is labeled only once in the design.
Signal         CPU_GP1 at (B 2) is labeled only once in the design.
Signal          GP_E03 at (C 2) is labeled only once in the design.
Signal          GP_E05 at (C 2) is labeled only once in the design.
Signal      PNL1_VDDEN at (A 2) is labeled only once in the design.
Signal          GP_E22 at (B 2) is labeled only once in the design.
Signal          GP_E17 at (B 2) is labeled only once in the design.
Signal   PSE_TGPIO17_A at (B 2) is labeled only once in the design.
Signal       PSE_PWM12 at (C 2) is labeled only once in the design.
Signal       PSE_PWM13 at (D 2) is labeled only once in the design.
Signal          GP_E07 at (C 2) is labeled only once in the design.
Signal   PSE_A_TGPIO19 at (C 2) is labeled only once in the design.
Signal     PSE_TGPIO23 at (C 2) is labeled only once in the design.
Signal     PSE_TGPIO24 at (C 2) is labeled only once in the design.
Signal   PNL_MISC_DDI2 at (A 2) is labeled only once in the design.
Signal   PSE_TGPIO15_A at (B 2) is labeled only once in the design.
Signal         CPU_GP0 at (B 2) is labeled only once in the design.
Signal   PSE_TGPIO16_A at (B 2) is labeled only once in the design.
Signal    DDI1_DDC_SDA at (C 2) is labeled only once in the design.
Signal        DDI1_HPD at (B 2) is labeled only once in the design.
Signal     PSE_PWM09_A at (B 2) is labeled only once in the design.
Signal   PNL_MISC_DDI0 at (A 2) is labeled only once in the design.
Signal   PNL_MISC_DDI1 at (A 2) is labeled only once in the design.
Signal     PSE_PWM14_A at (A 2) is labeled only once in the design.
Signal     PSE_PWM15_A at (A 2) is labeled only once in the design.
Signal     PSE_PWM11_A at (A 2) is labeled only once in the design.
Signal   PSE_TGPIO19_A at (A 2) is labeled only once in the design.
Signal     PSE_TGPIO46 at (A 2) is labeled only once in the design.
Signal   PSE_TGPIO18_A at (A 2) is labeled only once in the design.
Signal    PNL1_BKLTCTL at (A 2) is labeled only once in the design.
Signal          GP_E23 at (B 2) is labeled only once in the design.
Signal          GP_E18 at (D 2) is labeled only once in the design.
Signal          GP_E14 at (D 2) is labeled only once in the design.
Signal          GP_E19 at (D 2) is labeled only once in the design.
Signal    DDI0_DDC_SDA at (D 2) is labeled only once in the design.
Signal        DDI0_HPD at (D 2) is labeled only once in the design.
Signal    DDI0_DDC_SCL at (D 2) is labeled only once in the design.
Signal       DDI2_AUXP at (A 8) is labeled only once in the design.
Signal       DDI2_TXN3 at (B 8) is labeled only once in the design.
Signal       DDI2_TXP2 at (B 8) is labeled only once in the design.
Signal       DDI2_TXN2 at (B 8) is labeled only once in the design.
Signal       DDI2_TXN1 at (B 8) is labeled only once in the design.
Signal       DDI2_TXP0 at (B 8) is labeled only once in the design.
Signal       DDI0_AUXP at (C 8) is labeled only once in the design.
Signal GP_E23_PNL1_BKLTEN_PSE_PWM15_PSE_TGPIO19\G at (B 6) is labeled only once in the design.
Signal GP_E03_DDI1_HPD_PNL_MISC_DDI1_CPU_GP0_PSE_TGPIO15\G at (C 6) is labeled only once in the design.
Signal GP_E14_DDI0_HPD_PNL_MISC_DDI0_PSE_TGPIO19\G at (D 6) is labeled only once in the design.
Signal GP_E18_DDI0_DDC_SDA_PSE_PWM12_PSE_TGPIO23\G at (D 6) is labeled only once in the design.
Signal GP_E19_DDI0_DDC_SCL_PSE_PWM13_PSE_TGPIO24\G at (D 6) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i19@ehl_mcl_lib.ports_6(sch_1):Page1
Signal GP_G18_ESPI_IO3_PMC_SUSACK_N_R\G at (D 6) is labeled only once in the design.
Signal GP_G17_ESPI_IO2_PMC_SUSPWRDNACK_R\G at (D 6) is labeled only once in the design.
Signal GP_B23_PCHHOT_N_SIO_SPI1_CS1_N_PSE_SPI3_CS1_N_PSE_TGPIO28\G at (B 7) is labeled only once in the design.
Signal GP_B04_CPU_GP3_ESPI_ALERT1_N_PSE_TGPIO27\G at (B 7) is labeled only once in the design.
Signal GP_G16_ESPI_IO1_R\G at (D 6) is labeled only once in the design.
Signal GP_G21_ESPI_CLK_R\G at (D 6) is labeled only once in the design.
Signal GP_G15_ESPI_IO0_R\G at (D 6) is labeled only once in the design.
Signal     PSE_TGPIO28 at (A 3) is labeled only once in the design.
Signal     PSE_TGPIO25 at (A 3) is labeled only once in the design.
Signal     PSE_TGPIO27 at (A 3) is labeled only once in the design.
Signal     PSE_TGPIO26 at (A 3) is labeled only once in the design.
Signal  SIO_SPI0_CS1_N at (A 3) is labeled only once in the design.
Signal   ESPI_ALERT2_N at (B 3) is labeled only once in the design.
Signal   ESPI_ALERT0_N at (B 3) is labeled only once in the design.
Signal        PCHHOT_N at (A 3) is labeled only once in the design.
Signal   PMC_VRALERT_N at (A 3) is labeled only once in the design.
Signal SPKR_PMC_TGPIO1 at (A 3) is labeled only once in the design.
Signal   ESPI_ALERT1_N at (B 3) is labeled only once in the design.
Signal  PSE_SPI3_CS1_N at (A 3) is labeled only once in the design.
Signal  PSE_SPI2_CS1_N at (A 3) is labeled only once in the design.
Signal  SIO_SPI1_CS1_N at (B 3) is labeled only once in the design.
Signal         CPU_GP3 at (B 3) is labeled only once in the design.
Signal         CPU_GP2 at (B 3) is labeled only once in the design.
Signal          GP_B04 at (B 3) is labeled only once in the design.
Signal          GP_B14 at (B 3) is labeled only once in the design.
Signal          GP_B02 at (B 3) is labeled only once in the design.
Signal          GP_B03 at (B 3) is labeled only once in the design.
Signal          GP_B23 at (B 3) is labeled only once in the design.
Signal    PMC_SUSACK_N at (C 3) is labeled only once in the design.
Signal PMC_SUSPWRDNACK at (C 3) is labeled only once in the design.
Signal        ESPI_IO2 at (C 3) is labeled only once in the design.
Signal        ESPI_CLK at (C 3) is labeled only once in the design.
Signal      ESPI_CS0_N at (C 3) is labeled only once in the design.
Signal     ESPI_RST0_N at (C 3) is labeled only once in the design.
Signal        ESPI_IO1 at (C 3) is labeled only once in the design.
Signal        ESPI_IO0 at (C 3) is labeled only once in the design.
Signal        ESPI_IO3 at (C 3) is labeled only once in the design.
Signal          GP_G20 at (D 3) is labeled only once in the design.
Signal          GP_G22 at (D 3) is labeled only once in the design.
Signal          GP_G16 at (D 3) is labeled only once in the design.
Signal          GP_G17 at (D 3) is labeled only once in the design.
Signal          GP_G15 at (D 3) is labeled only once in the design.
Signal          GP_G18 at (D 3) is labeled only once in the design.
Signal          GP_G21 at (D 3) is labeled only once in the design.
Signal GP_G17_ESPI_IO2_PMC_SUSPWRDNACK at (D 8) is labeled only once in the design.
Signal GP_G18_ESPI_IO3_PMC_SUSACK_N at (D 8) is labeled only once in the design.
Signal GP_B14_SPKR_PMC_TGPIO1_SIO_SPI0_CS1_N_PSE_SPI2_CS1_N\G at (B 7) is labeled only once in the design.
Signal GP_B02_PMC_VRALERT_N_ESPI_ALERT2_N_PSE_TGPIO25\G at (B 7) is labeled only once in the design.
Signal GP_B03_CPU_GP2_ESPI_ALERT0_N_PSE_TGPIO26\G at (B 7) is labeled only once in the design.
Signal GP_G20_ESPI_CS0_N\G at (D 8) is labeled only once in the design.
Signal GP_G22_ESPI_RST0_N\G at (D 8) is labeled only once in the design.
Signal GP_G16_ESPI_IO1 at (D 8) is labeled only once in the design.
Signal GP_G21_ESPI_CLK at (D 8) is labeled only once in the design.
Signal GP_G15_ESPI_IO0 at (D 8) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i20@ehl_mcl_lib.ports_7(sch_1):Page1
Signal    SPI_CS0_SW_N at (D 8) is labeled only once in the design.
Signal      SPI_DQ2_SW at (D 8) is labeled only once in the design.
Signal     SPI_TPM_CS2 at (C 8) is labeled only once in the design.
Signal      SPI_DQ3_SW at (D 8) is labeled only once in the design.
Signal       SPI_CS1_N at (C 8) is labeled only once in the design.
Signal GP_B18_SIO_SPI0_MOSI_PSE_SPI2_MOSI\G at (C 8) is labeled only once in the design.
Signal GP_B17_SIO_SPI0_MISO_PSE_SPI2_MISO\G at (C 8) is labeled only once in the design.
Signal GP_B15_SIO_SPI0_CS0_N_PSE_SPI2_CS0_N_ESPI_CS1_N\G at (C 8) is labeled only once in the design.
Signal DEDI_PROG_RST_N at (C 8) is labeled only once in the design.
Signal GP_B16_SIO_SPI0_CLK_PSE_SPI2_CLK\G at (C 8) is labeled only once in the design.
Signal          GP_B10 at (A 5) is labeled only once in the design.
Signal          GP_B09 at (A 5) is labeled only once in the design.
Signal    SIO_I2C5_SCL at (A 5) is labeled only once in the design.
Signal    SIO_I2C5_SDA at (A 5) is labeled only once in the design.
Signal      ESPI_CS3_N at (A 5) is labeled only once in the design.
Signal    PSE_I2C2_SCL at (A 5) is labeled only once in the design.
Signal    PSE_I2C2_SDA at (A 5) is labeled only once in the design.
Signal   ESPI_ALERT3_N at (A 5) is labeled only once in the design.
Signal    PSE_SPI2_CLK at (B 5) is labeled only once in the design.
Signal   SIO_SPI0_MISO at (C 5) is labeled only once in the design.
Signal          GP_B15 at (C 5) is labeled only once in the design.
Signal          GP_B17 at (C 5) is labeled only once in the design.
Signal          GP_B18 at (C 5) is labeled only once in the design.
Signal          GP_B16 at (C 5) is labeled only once in the design.
Signal      ESPI_CS1_N at (B 5) is labeled only once in the design.
Signal  PSE_SPI2_CS0_N at (B 5) is labeled only once in the design.
Signal   PSE_SPI2_MISO at (B 5) is labeled only once in the design.
Signal    SIO_SPI0_CLK at (C 5) is labeled only once in the design.
Signal   SIO_SPI0_MOSI at (C 5) is labeled only once in the design.
Signal  SIO_SPI0_CS0_N at (B 5) is labeled only once in the design.
Signal   PSE_SPI2_MOSI at (B 5) is labeled only once in the design.
Signal     SPI_MOSI_SW at (D 8) is labeled only once in the design.
Signal     SPI_MISO_SW at (D 8) is labeled only once in the design.
Signal      SPI_CLK_SW at (D 8) is labeled only once in the design.
Signal GP_H19_DDI2_DDC_SDA_PMC_TGPIO0_PSE_TGPIO20\G at (A 4) is labeled only once in the design.
Signal GP_B19_SIO_SPI1_CS0_N_PSE_SPI3_CS0_N_ESPI_CS2_N\G at (C 5) is labeled only once in the design.
Signal GP_B21_SIO_SPI1_MISO_PSE_SPI3_MISO\G at (C 5) is labeled only once in the design.
Signal GP_B22_SIO_SPI1_MOSI_PSE_SPI3_MOSI\G at (C 5) is labeled only once in the design.
Signal GP_B20_SIO_SPI1_CLK_PSE_SPI3_CLK\G at (C 5) is labeled only once in the design.
Signal     PSE_TGPIO20 at (A 1) is labeled only once in the design.
Signal     PSE_TGPIO55 at (A 1) is labeled only once in the design.
Signal    DDI2_DDC_SDA at (A 1) is labeled only once in the design.
Signal        DDI2_HPD at (A 1) is labeled only once in the design.
Signal          GP_H20 at (A 1) is labeled only once in the design.
Signal          GP_H19 at (A 1) is labeled only once in the design.
Signal       PSE_PWM07 at (A 1) is labeled only once in the design.
Signal      PMC_TGPIO0 at (A 1) is labeled only once in the design.
Signal CNV_RF_RESET_N_A at (D 2) is labeled only once in the design.
Signal   SIO_SPI1_MOSI at (C 1) is labeled only once in the design.
Signal      ESPI_CS2_N at (B 1) is labeled only once in the design.
Signal  PSE_SPI3_CS0_N at (B 1) is labeled only once in the design.
Signal   PSE_SPI3_MISO at (B 1) is labeled only once in the design.
Signal   PSE_SPI3_MOSI at (B 1) is labeled only once in the design.
Signal    PSE_SPI3_CLK at (B 1) is labeled only once in the design.
Signal  SIO_SPI1_CS0_N at (B 1) is labeled only once in the design.
Signal          GP_B19 at (C 1) is labeled only once in the design.
Signal    SIO_SPI1_CLK at (C 1) is labeled only once in the design.
Signal          GP_B21 at (C 1) is labeled only once in the design.
Signal          GP_B22 at (C 1) is labeled only once in the design.
Signal          GP_B20 at (C 1) is labeled only once in the design.
Signal   SIO_SPI1_MISO at (C 1) is labeled only once in the design.
Signal GP_F04_CNV_RF_RESET_N\G at (D 4) is labeled only once in the design.
Signal          GP_F04 at (D 2) is labeled only once in the design.
Signal GP_B09_SIO_I2C5_SDA_PSE_I2C2_SDA_ESPI_CS3_N\G at (A 8) is labeled only once in the design.
Signal GP_B10_SIO_I2C5_SCL_PSE_I2C2_SCL_ESPI_ALERT3_N\G at (A 8) is labeled only once in the design.
Signal GP_H20_PSE_PWM07_DDI2_HPD_PSE_TGPIO55\G at (A 4) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i21@ehl_mcl_lib.ports_8(sch_1):Page1
Signal PCIE_1_RXP_USB3_3_RXP\G at (A 8) is labeled only once in the design.
Signal PCIE_1_TXP_USB3_3_TXP\G at (A 8) is labeled only once in the design.
Signal PCIE_1_TXN_USB3_3_TXN\G at (A 8) is labeled only once in the design.
Signal PCIE_1_RXN_USB3_3_RXN\G at (A 8) is labeled only once in the design.
Signal PCIE_0_TXP_USB3_2_TXP\G at (B 8) is labeled only once in the design.
Signal PCIE_0_TXN_USB3_2_TXN\G at (B 8) is labeled only once in the design.
Signal PCIE_0_RXP_USB3_2_RXP\G at (B 8) is labeled only once in the design.
Signal PCIE_0_RXN_USB3_2_RXN\G at (B 8) is labeled only once in the design.
Signal      PCIE_3_RXN at (C 8) is labeled only once in the design.
Signal      PCIE_3_RXP at (C 8) is labeled only once in the design.
Signal      USB3_1_RXN at (C 8) is labeled only once in the design.
Signal      PCIE_3_TXP at (C 8) is labeled only once in the design.
Signal      PCIE_3_TXN at (C 8) is labeled only once in the design.
Signal      PCIE_2_TXP at (C 8) is labeled only once in the design.
Signal      PCIE_2_RXP at (C 8) is labeled only once in the design.
Signal      PCIE_2_RXN at (C 8) is labeled only once in the design.
Signal      USB3_3_RXN at (A 5) is labeled only once in the design.
Signal      PCIE_1_TXP at (A 5) is labeled only once in the design.
Signal      USB3_2_RXN at (B 5) is labeled only once in the design.
Signal      USB3_3_RXP at (A 5) is labeled only once in the design.
Signal      USB3_3_TXP at (A 5) is labeled only once in the design.
Signal      USB3_3_TXN at (A 5) is labeled only once in the design.
Signal      PCIE_1_RXP at (A 5) is labeled only once in the design.
Signal      PCIE_1_RXN at (A 5) is labeled only once in the design.
Signal      PCIE_1_TXN at (A 5) is labeled only once in the design.
Signal      PCIE_0_TXP at (B 5) is labeled only once in the design.
Signal      PCIE_0_TXN at (B 5) is labeled only once in the design.
Signal      PCIE_0_RXP at (B 5) is labeled only once in the design.
Signal      PCIE_0_RXN at (B 5) is labeled only once in the design.
Signal      USB3_2_TXP at (B 5) is labeled only once in the design.
Signal      USB3_2_TXN at (B 5) is labeled only once in the design.
Signal      USB3_2_RXP at (B 5) is labeled only once in the design.
Signal      USB3_1_RXP at (C 8) is labeled only once in the design.
Signal      USB3_0_TXP at (D 8) is labeled only once in the design.
Signal      USB3_1_TXP at (D 8) is labeled only once in the design.
Signal      USB3_0_TXN at (D 8) is labeled only once in the design.
Signal      USB3_0_RXN at (D 8) is labeled only once in the design.
Signal      USB3_0_RXP at (D 8) is labeled only once in the design.
Signal      USB3_1_TXN at (D 8) is labeled only once in the design.
Signal GP_DSW08_PMC_SUSCLK at (A 5) is labeled only once in the design.
Signal GP_U17_ISI_OKNOK_1\G at (B 4) is labeled only once in the design.
Signal GP_U16_ISI_OKNOK_0\G at (B 4) is labeled only once in the design.
Signal GP_U18_ISI_ALERT\G at (B 4) is labeled only once in the design.
Signal GP_DSW08_PMC_SUSCLK_R\G at (A 4) is labeled only once in the design.
Signal        PSE_ADC6 at (B 4) is labeled only once in the design.
Signal        PSE_ADC7 at (B 4) is labeled only once in the design.
Signal        PSE_ADC5 at (B 4) is labeled only once in the design.
Signal        PSE_ADC3 at (B 4) is labeled only once in the design.
Signal        PSE_ADC1 at (C 4) is labeled only once in the design.
Signal        PSE_ADC0 at (C 4) is labeled only once in the design.
Signal        PSE_ADC4 at (B 4) is labeled only once in the design.
Signal        PSE_ADC2 at (C 4) is labeled only once in the design.
Signal     ISI_OKNOK_1 at (A 1) is labeled only once in the design.
Signal       ISI_ALERT at (A 1) is labeled only once in the design.
Signal ISI_OKNOK_0ISI_ALERT at (A 1) is labeled only once in the design.
Signal          GP_U16 at (B 1) is labeled only once in the design.
Signal        GP_DSW08 at (A 1) is labeled only once in the design.
Signal      PMC_SUSCLK at (A 1) is labeled only once in the design.
Signal          GP_U18 at (B 1) is labeled only once in the design.
Signal          GP_U17 at (B 1) is labeled only once in the design.
Signal      UFS_0_RXP0 at (C 1) is labeled only once in the design.
Signal      UFS_0_RXN0 at (C 1) is labeled only once in the design.
Signal      UFS_0_TXN0 at (C 1) is labeled only once in the design.
Signal PCIE_4_RXN_UFS_0_RXN0\G at (D 4) is labeled only once in the design.
Signal PCIE_4_TXP_UFS_0_TXP0\G at (D 4) is labeled only once in the design.
Signal PCIE_4_RXP_UFS_0_RXP0\G at (D 4) is labeled only once in the design.
Signal PCIE_4_TXN_UFS_0_TXN0\G at (D 4) is labeled only once in the design.
Signal      UFS_0_TXP0 at (D 1) is labeled only once in the design.
Signal      PCIE_4_RXP at (D 1) is labeled only once in the design.
Signal      PCIE_4_RXN at (D 1) is labeled only once in the design.
Signal      PCIE_4_TXP at (D 1) is labeled only once in the design.
Signal      PCIE_4_TXN at (D 1) is labeled only once in the design.
Signal      PCIE_2_TXN at (C 8) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i22@ehl_mcl_lib.ports_9(sch_1):Page1
Signal GP_V15_PSE_TGPIO03\G at (A 8) is labeled only once in the design.
Signal GP_V14_PSE_TGPIO02\G at (A 8) is labeled only once in the design.
Signal GP_V13_PSE_TGPIO01\G at (A 8) is labeled only once in the design.
Signal GP_H10_PCIE_CLKREQ4_N_PSE_PWM14\G at (B 8) is labeled only once in the design.
Signal GP_H11_PCIE_CLKREQ5_N_PSE_PWM15\G at (B 8) is labeled only once in the design.
Signal GP_D08_PCIE_CLKREQ3_N at (B 8) is labeled only once in the design.
Signal GP_D07_PCIE_CLKREQ2_N at (B 8) is labeled only once in the design.
Signal GP_D06_PCIE_CLKREQ1_N at (B 8) is labeled only once in the design.
Signal GP_V12_PSE_TGPIO00\G at (A 8) is labeled only once in the design.
Signal GP_D05_PCIE_CLKREQ0_N at (B 8) is labeled only once in the design.
Signal     PSE_TGPIO01 at (A 5) is labeled only once in the design.
Signal     PSE_TGPIO02 at (A 5) is labeled only once in the design.
Signal     PSE_TGPIO00 at (A 5) is labeled only once in the design.
Signal     PSE_TGPIO03 at (A 5) is labeled only once in the design.
Signal          GP_V13 at (A 5) is labeled only once in the design.
Signal          GP_V14 at (A 5) is labeled only once in the design.
Signal          GP_V15 at (A 5) is labeled only once in the design.
Signal          GP_V12 at (A 5) is labeled only once in the design.
Signal     PSE_PWM15_B at (B 5) is labeled only once in the design.
Signal  PCIE_CLKREQ4_N at (B 5) is labeled only once in the design.
Signal  PCIE_CLKREQ5_N at (B 5) is labeled only once in the design.
Signal     PSE_PWM14_B at (B 5) is labeled only once in the design.
Signal     PCIE_CLK4_P at (C 5) is labeled only once in the design.
Signal     PCIE_CLK4_N at (C 5) is labeled only once in the design.
Signal   UFS_REF_CLK_0 at (C 5) is labeled only once in the design.
Signal   UFS_REF_CLK_1 at (C 5) is labeled only once in the design.
Signal    PCIE_CLK1_DN at (D 8) is labeled only once in the design.
Signal    PCIE_CLK2_DN at (D 8) is labeled only once in the design.
Signal    PCIE_CLK0_DN at (D 8) is labeled only once in the design.
Signal    PCIE_CLK0_DP at (D 8) is labeled only once in the design.
Signal PCIE_9_RXN_SATA_1_RXN_PSE_GBE1_SGM1_RXN\G at (A 4) is labeled only once in the design.
Signal PCIE_9_RXP_SATA_1_RXP_PSE_GBE1_SGM1_RXP\G at (A 4) is labeled only once in the design.
Signal PCIE_9_TXP_SATA_1_TXP_PSE_GBE1_SGM1_TXP\G at (A 4) is labeled only once in the design.
Signal PCIE_9_TXN_SATA_1_TXN_PSE_GBE1_SGM1_TXN\G at (A 4) is labeled only once in the design.
Signal PCIE_5_RXN_UFS_0_RXN1_PSE_GBE0_SGM0_RXN\G at (D 4) is labeled only once in the design.
Signal PCIE_8_RXN_SATA_0_RXN_GBE_SGM2_RXN\G at (B 4) is labeled only once in the design.
Signal PCIE_8_RXP_SATA_0_RXP_GBE_SGM2_RXP\G at (B 4) is labeled only once in the design.
Signal PCIE_8_TXN_SATA_0_TXN_GBE_SGM2_TXN\G at (C 4) is labeled only once in the design.
Signal PCIE_8_TXP_SATA_0_TXP_GBE_SGM2_TXP\G at (C 4) is labeled only once in the design.
Signal PSE_GBE1_SGM1_RXN at (A 1) is labeled only once in the design.
Signal PSE_GBE1_SGM1_RXP at (A 1) is labeled only once in the design.
Signal PSE_GBE1_SGM1_TXP at (A 1) is labeled only once in the design.
Signal      SATA_1_RXN at (A 1) is labeled only once in the design.
Signal PSE_GBE1_SGM1_TXN at (A 1) is labeled only once in the design.
Signal      SATA_1_RXP at (A 1) is labeled only once in the design.
Signal      SATA_1_TXN at (A 1) is labeled only once in the design.
Signal      SATA_1_TXP at (A 1) is labeled only once in the design.
Signal      PCIE_9_TXP at (A 1) is labeled only once in the design.
Signal      PCIE_9_RXN at (A 1) is labeled only once in the design.
Signal      PCIE_9_RXP at (A 1) is labeled only once in the design.
Signal      PCIE_9_TXN at (A 1) is labeled only once in the design.
Signal    GBE_SGM2_RXP at (B 1) is labeled only once in the design.
Signal    GBE_SGM2_RXN at (B 1) is labeled only once in the design.
Signal      SATA_0_RXN at (B 1) is labeled only once in the design.
Signal    GBE_SGM2_TXN at (B 1) is labeled only once in the design.
Signal    GBE_SGM2_TXP at (B 1) is labeled only once in the design.
Signal      SATA_0_RXP at (B 1) is labeled only once in the design.
Signal      SATA_0_TXP at (B 1) is labeled only once in the design.
Signal      SATA_0_TXN at (B 1) is labeled only once in the design.
Signal      PCIE_8_RXN at (B 1) is labeled only once in the design.
Signal      PCIE_8_RXP at (B 1) is labeled only once in the design.
Signal      PCIE_8_TXN at (C 1) is labeled only once in the design.
Signal      PCIE_8_TXP at (C 1) is labeled only once in the design.
Signal PSE_GBE0_SGM0_RXN at (C 1) is labeled only once in the design.
Signal PSE_GBE0_SGM0_RXP at (C 1) is labeled only once in the design.
Signal PSE_GBE0_SGM0_TXN at (C 1) is labeled only once in the design.
Signal PSE_GBE0_SGM0_TXP at (C 1) is labeled only once in the design.
Signal      UFS_0_RXP1 at (C 1) is labeled only once in the design.
Signal      UFS_0_RXN1 at (C 1) is labeled only once in the design.
Signal      UFS_0_TXN1 at (C 1) is labeled only once in the design.
Signal      UFS_0_TXP1 at (C 1) is labeled only once in the design.
Signal      PCIE_5_RXN at (D 1) is labeled only once in the design.
Signal PCIE_5_RXP_UFS_0_RXP1_PSE_GBE0_SGM0_RXP\G at (D 4) is labeled only once in the design.
Signal      PCIE_5_RXP at (D 1) is labeled only once in the design.
Signal      PCIE_5_TXP at (D 1) is labeled only once in the design.
Signal      PCIE_5_TXN at (D 1) is labeled only once in the design.
Signal PCIE_CLK4_N_UFS_REF_CLK_1\G at (C 8) is labeled only once in the design.
Signal PCIE_CLK4_P_UFS_REF_CLK_0\G at (C 8) is labeled only once in the design.
Signal GP_S00_UFS_0_CLK at (C 8) is labeled only once in the design.
Signal GP_S01_UFS_1_CLK at (C 8) is labeled only once in the design.
Signal    PCIE_CLK5_DN at (C 8) is labeled only once in the design.
Signal    PCIE_CLK3_DN at (C 8) is labeled only once in the design.
Signal    PCIE_CLK5_DP at (C 8) is labeled only once in the design.
Signal    PCIE_CLK3_DP at (D 8) is labeled only once in the design.
Signal    PCIE_CLK2_DP at (D 8) is labeled only once in the design.
Signal    PCIE_CLK1_DP at (D 8) is labeled only once in the design.
Signal PCIE_5_TXP_UFS_0_TXP1_PSE_GBE0_SGM0_TXP\G at (D 4) is labeled only once in the design.
Signal PCIE_5_TXN_UFS_0_TXN1_PSE_GBE0_SGM0_TXN\G at (D 4) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i23@ehl_mcl_lib.ports_10(sch_1):Page1
Signal GP_U12_ISI_CHX_OKNOK_0\G at (B 8) is labeled only once in the design.
Signal GP_G19_AVS_I2S1_SCLK\G at (A 7) is labeled only once in the design.
Signal GP_R06_AVS_I2S1_TXD_DMIC_CLK_A0 at (A 7) is labeled only once in the design.
Signal GP_R07_AVS_I2S1_SFRM_DMIC_DATA0\G at (A 7) is labeled only once in the design.
Signal   PSE_TGPIO13_B at (B 4) is labeled only once in the design.
Signal GP_R06_AVS_I2S1_TXD_DMIC_CLK_A0_R\G at (A 5) is labeled only once in the design.
Signal     PSE_TGPIO10 at (C 4) is labeled only once in the design.
Signal     PSE_TGPIO39 at (C 4) is labeled only once in the design.
Signal          GP_U12 at (B 4) is labeled only once in the design.
Signal ISI_CHX_OKNOK_1 at (B 4) is labeled only once in the design.
Signal ISI_CHX_PMIC_EN at (B 4) is labeled only once in the design.
Signal ISI_CHX_RLY_SWTCH at (B 4) is labeled only once in the design.
Signal          GP_U15 at (B 4) is labeled only once in the design.
Signal ISI_CHX_OKNOK_0 at (B 4) is labeled only once in the design.
Signal          GP_U13 at (B 4) is labeled only once in the design.
Signal          GP_U14 at (B 4) is labeled only once in the design.
Signal       PSE_PWM03 at (C 4) is labeled only once in the design.
Signal     PSE_TGPIO11 at (C 4) is labeled only once in the design.
Signal   SIO_SPI2_MOSI at (C 4) is labeled only once in the design.
Signal   SIO_SPI2_MISO at (C 4) is labeled only once in the design.
Signal  SIO_SPI2_CS0_N at (C 4) is labeled only once in the design.
Signal  PSE_SPI0_CS0_N at (C 4) is labeled only once in the design.
Signal   PSE_SPI0_MISO at (D 4) is labeled only once in the design.
Signal   PSE_SPI0_MOSI at (D 4) is labeled only once in the design.
Signal  PSE_SPI0_CS1_N at (C 4) is labeled only once in the design.
Signal   PSE_TGPIO13_A at (C 4) is labeled only once in the design.
Signal     PSE_TGPIO12 at (C 4) is labeled only once in the design.
Signal  SIO_SPI2_CS1_N at (C 4) is labeled only once in the design.
Signal    SIO_SPI2_CLK at (C 4) is labeled only once in the design.
Signal GP_D10_PSE_SPI0_CLK_SIO_SPI2_CLK_PSE_TGPIO11\G at (D 8) is labeled only once in the design.
Signal          GP_D12 at (D 4) is labeled only once in the design.
Signal          GP_D15 at (D 4) is labeled only once in the design.
Signal    PSE_SPI0_CLK at (D 4) is labeled only once in the design.
Signal          GP_D10 at (D 4) is labeled only once in the design.
Signal          GP_D09 at (D 4) is labeled only once in the design.
Signal          GP_D11 at (D 4) is labeled only once in the design.
Signal   DMIC_CLK_A0_A at (A 3) is labeled only once in the design.
Signal      DMIC_DATA0 at (A 3) is labeled only once in the design.
Signal    AVS_I2S1_TXD at (A 3) is labeled only once in the design.
Signal   AVS_I2S1_SCLK at (A 3) is labeled only once in the design.
Signal          GP_R06 at (A 3) is labeled only once in the design.
Signal          GP_R07 at (A 3) is labeled only once in the design.
Signal          GP_G19 at (A 3) is labeled only once in the design.
Signal   AVS_I2S1_SFRM at (A 3) is labeled only once in the design.
Signal GP_B11_PMC_ALERT_N_PSE_TGPIO06\G at (B 4) is labeled only once in the design.
Signal GP_E02_TSPI_IO3\G at (C 4) is labeled only once in the design.
Signal GP_E01_TSPI_IO2\G at (C 4) is labeled only once in the design.
Signal GP_E06_PSE_PWM10_PSE_TGPIO18\G at (C 4) is labeled only once in the design.
Signal GP_E12_TSPI_MISO_IO1\G at (C 4) is labeled only once in the design.
Signal GP_E11_TSPI_CLK\G at (C 4) is labeled only once in the design.
Signal GP_E10_TSPI_CS0_N\G at (C 4) is labeled only once in the design.
Signal GP_E13_TSPI_MOSI_IO0\G at (C 4) is labeled only once in the design.
Signal GP_C02_PSE_PWM00_SMB_ALERT_N_PSE_TGPIO29\G at (B 4) is labeled only once in the design.
Signal   PSE_TGPIO06_D at (A 1) is labeled only once in the design.
Signal     PMC_ALERT_N at (A 1) is labeled only once in the design.
Signal     PSE_TGPIO29 at (B 1) is labeled only once in the design.
Signal          GP_B11 at (B 1) is labeled only once in the design.
Signal      TSPI_CS0_N at (C 1) is labeled only once in the design.
Signal        TSPI_IO2 at (C 1) is labeled only once in the design.
Signal          GP_E10 at (C 1) is labeled only once in the design.
Signal          GP_E11 at (C 1) is labeled only once in the design.
Signal          GP_E13 at (C 1) is labeled only once in the design.
Signal          GP_E12 at (C 1) is labeled only once in the design.
Signal          GP_E01 at (C 1) is labeled only once in the design.
Signal          GP_E02 at (C 1) is labeled only once in the design.
Signal        TSPI_CLK at (C 1) is labeled only once in the design.
Signal   TSPI_MOSI_IO0 at (C 1) is labeled only once in the design.
Signal   TSPI_MISO_IO1 at (C 1) is labeled only once in the design.
Signal        TSPI_IO3 at (C 1) is labeled only once in the design.
Signal          GP_E06 at (C 1) is labeled only once in the design.
Signal     SMB_ALERT_N at (B 1) is labeled only once in the design.
Signal       PSE_PWM00 at (B 1) is labeled only once in the design.
Signal         TGPIO18 at (B 1) is labeled only once in the design.
Signal     PSE_PWM10_A at (C 1) is labeled only once in the design.
Signal          GP_C02 at (B 1) is labeled only once in the design.
Signal GP_U14_ISI_CHX_RLY_SWTCH\G at (B 8) is labeled only once in the design.
Signal GP_U15_ISI_CHX_PMIC_EN_PSE_TGPIO13\G at (B 8) is labeled only once in the design.
Signal GP_U13_ISI_CHX_OKNOK_1\G at (B 8) is labeled only once in the design.
Signal GP_D15_PSE_PWM03_SIO_SPI2_CS1_N_PSE_SPI0_CS1_N_PSE_TGPIO39\G at (D 8) is labeled only once in the design.
Signal GP_D09_PSE_SPI0_CS0_N_SIO_SPI2_CS0_N_PSE_TGPIO10\G at (D 8) is labeled only once in the design.
Signal GP_D11_PSE_SPI0_MISO_SIO_SPI2_MISO_PSE_TGPIO12\G at (D 8) is labeled only once in the design.
Signal GP_D12_PSE_SPI0_MOSI_SIO_SPI2_MOSI_PSE_TGPIO13\G at (D 8) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i24@ehl_mcl_lib.ports_11(sch_1):Page1
Signal GP_E15_PSE_I2S0_RXD_PSE_CAN0_TX_PSE_TGPIO17 at (C 8) is labeled only once in the design.
Signal GP_E20_PSE_I2S0_SCLK_PSE_CAN1_TX_PSE_TGPIO14 at (B 8) is labeled only once in the design.
Signal GP_E20_PSE_I2S0_SCLK_PSE_CAN1_TX_PSE_TGPIO14_R\G at (B 6) is labeled only once in the design.
Signal GP_G07_AVS_I2S2_SCLK_DMIC_CLK_A0 at (A 8) is labeled only once in the design.
Signal GP_E21_PSE_I2S0_SFRM_PSE_CAN1_RX_PSE_TGPIO15_R\G at (B 6) is labeled only once in the design.
Signal GP_E16_PSE_I2S0_TXD_PSE_CAN0_RX_PSE_TGPIO16_R\G at (C 6) is labeled only once in the design.
Signal GP_G13_AVS_I2S3_TXD_DMIC_CLK_B0_PSE_TGPIO08 at (D 8) is labeled only once in the design.
Signal GP_G11_AVS_I2S3_SCLK_DMIC_DATA0_PSE_TGPIO07 at (D 8) is labeled only once in the design.
Signal GP_G14_AVS_I2S3_RXD_DMIC_CLK_B1_PSE_TGPIO09 at (D 8) is labeled only once in the design.
Signal GP_G12_AVS_I2S3_SFRM_SATA_1_GP_SATAXPCIE_1_DMIC_DATA1_PSE_TGPIO31 at (D 8) is labeled only once in the design.
Signal GP_G14_AVS_I2S3_RXD_DMIC_CLK_B1_PSE_TGPIO09_R\G at (D 6) is labeled only once in the design.
Signal GP_G11_AVS_I2S3_SCLK_DMIC_DATA0_PSE_TGPIO07_R\G at (D 6) is labeled only once in the design.
Signal GP_G12_AVS_I2S3_SFRM_SATA_1_GP_SATAXPCIE_1_DMIC_DATA1_PSE_TGPIO31_R\G at (D 6) is labeled only once in the design.
Signal GP_G10_AVS_I2S2_RXD_DMIC_DATA1_R\G at (A 5) is labeled only once in the design.
Signal GP_G07_AVS_I2S2_SCLK_DMIC_CLK_A0_R\G at (A 5) is labeled only once in the design.
Signal GP_G13_AVS_I2S3_TXD_DMIC_CLK_B0_PSE_TGPIO08_R\G at (D 6) is labeled only once in the design.
Signal GP_E15_PSE_I2S0_RXD_PSE_CAN0_TX_PSE_TGPIO17_R\G at (C 6) is labeled only once in the design.
Signal GP_G09_AVS_I2S2_TXD_MODEM_CLKREQ_CRF_XTAL_CLKREQ_DMIC_CLK_A1_R\G at (A 5) is labeled only once in the design.
Signal GP_G08_AVS_I2S2_SFRM_CNV_RF_RESET_N_DMIC_DATA0_R\G at (A 5) is labeled only once in the design.
Signal   PSE_TGPIO16_B at (B 3) is labeled only once in the design.
Signal   PSE_TGPIO14_B at (B 3) is labeled only once in the design.
Signal     PSE_CAN1_RX at (B 3) is labeled only once in the design.
Signal   PSE_TGPIO17_B at (B 3) is labeled only once in the design.
Signal   PSE_TGPIO15_B at (B 3) is labeled only once in the design.
Signal          GP_E21 at (B 3) is labeled only once in the design.
Signal    DMIC_DATA1_A at (D 3) is labeled only once in the design.
Signal   DMIC_CLK_B1_A at (C 3) is labeled only once in the design.
Signal     PSE_TGPIO08 at (C 3) is labeled only once in the design.
Signal     PSE_TGPIO31 at (C 3) is labeled only once in the design.
Signal     PSE_TGPIO07 at (C 3) is labeled only once in the design.
Signal    DMIC_DATA0_A at (C 3) is labeled only once in the design.
Signal  GP_SATAXPCIE_1 at (C 3) is labeled only once in the design.
Signal          GP_E16 at (C 3) is labeled only once in the design.
Signal    AVS_I2S3_RXD at (D 3) is labeled only once in the design.
Signal     PSE_CAN0_TX at (B 3) is labeled only once in the design.
Signal          GP_E15 at (C 3) is labeled only once in the design.
Signal  PSE_I2S0_RXD_A at (B 3) is labeled only once in the design.
Signal  PSE_I2S0_TXD_A at (B 3) is labeled only once in the design.
Signal PSE_I2S0_SCLK_A at (B 3) is labeled only once in the design.
Signal PSE_I2S0_SFRM_A at (B 3) is labeled only once in the design.
Signal     PSE_CAN1_TX at (B 3) is labeled only once in the design.
Signal     PSE_CAN0_RX at (B 3) is labeled only once in the design.
Signal   DMIC_CLK_B0_A at (D 3) is labeled only once in the design.
Signal     PSE_TGPIO09 at (C 3) is labeled only once in the design.
Signal   AVS_I2S2_SFRM at (A 2) is labeled only once in the design.
Signal    AVS_I2S2_TXD at (A 2) is labeled only once in the design.
Signal   DMIC_CLK_A0_B at (A 2) is labeled only once in the design.
Signal    DMIC_DATA1_B at (A 2) is labeled only once in the design.
Signal   DMIC_CLK_A1_A at (A 2) is labeled only once in the design.
Signal   AVS_I2S2_SCLK at (A 2) is labeled only once in the design.
Signal          GP_G10 at (A 2) is labeled only once in the design.
Signal          GP_G08 at (A 2) is labeled only once in the design.
Signal          GP_G09 at (A 2) is labeled only once in the design.
Signal          GP_G07 at (A 2) is labeled only once in the design.
Signal    AVS_I2S2_RXD at (A 2) is labeled only once in the design.
Signal CNV_RF_RESET_N_B at (A 2) is labeled only once in the design.
Signal  MODEM_CLKREQ_A at (A 2) is labeled only once in the design.
Signal    DMIC_DATA0_B at (A 2) is labeled only once in the design.
Signal CRF_XTAL_CLKREQ_A at (A 2) is labeled only once in the design.
Signal    AVS_I2S3_TXD at (D 3) is labeled only once in the design.
Signal   AVS_I2S3_SFRM at (D 3) is labeled only once in the design.
Signal   AVS_I2S3_SCLK at (D 3) is labeled only once in the design.
Signal          GP_G13 at (D 3) is labeled only once in the design.
Signal          GP_G14 at (D 3) is labeled only once in the design.
Signal          GP_G11 at (D 3) is labeled only once in the design.
Signal          GP_G12 at (D 3) is labeled only once in the design.
Signal GP_G10_AVS_I2S2_RXD_DMIC_DATA1 at (A 8) is labeled only once in the design.
Signal GP_G08_AVS_I2S2_SFRM_CNV_RF_RESET_N_DMIC_DATA0 at (A 8) is labeled only once in the design.
Signal GP_G09_AVS_I2S2_TXD_MODEM_CLKREQ_CRF_XTAL_CLKREQ_DMIC_CLK_A1 at (A 8) is labeled only once in the design.
Signal GP_E21_PSE_I2S0_SFRM_PSE_CAN1_RX_PSE_TGPIO15 at (B 8) is labeled only once in the design.
Signal GP_E16_PSE_I2S0_TXD_PSE_CAN0_RX_PSE_TGPIO16 at (C 8) is labeled only once in the design.
Signal          GP_E20 at (B 3) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i25@ehl_mcl_lib.ports_12(sch_1):Page1
Signal GP_R04_HDA_RST_N_DMIC_CLK_A1 at (B 8) is labeled only once in the design.
Signal GP_F13_AVS_I2S4_SFRM_PSE_SWDIO at (D 6) is labeled only once in the design.
Signal GP_R05_HDA_SDI1_AVS_I2S1_RXD_DMIC_DATA1_R\G at (B 5) is labeled only once in the design.
Signal GP_R01_HDA_SYNC_AVS_I2S0_SFRM_PSE_I2S0_SFRM_R\G at (B 5) is labeled only once in the design.
Signal GP_R03_HDA_SDI0_AVS_I2S0_RXD_PSE_I2S0_RXD_DMIC_CLK_B1_R\G at (B 5) is labeled only once in the design.
Signal GP_R02_HDA_SDO_AVS_I2S0_TXD_PSE_I2S0_TXD_DMIC_CLK_B0_R\G at (B 5) is labeled only once in the design.
Signal GP_F15_PSE_TRACEDATA_2\G at (D 6) is labeled only once in the design.
Signal GP_R04_HDA_RST_N_DMIC_CLK_A1_R\G at (B 5) is labeled only once in the design.
Signal GP_R00_HDA_BCLK_AVS_I2S0_SCLK_PSE_I2S0_SCLK_R\G at (B 5) is labeled only once in the design.
Signal GP_F17_PSE_TRACEDATA_3_PSE_TGPIO50\G at (D 6) is labeled only once in the design.
Signal GP_F05_MODEM_CLKREQ_CRF_XTAL_CLKREQ_PSE_TGPIO14\G at (D 6) is labeled only once in the design.
Signal GP_F13_AVS_I2S4_SFRM_PSE_SWDIO_R\G at (D 5) is labeled only once in the design.
Signal GP_F12_AVS_I2S4_TXD_PSE_TRACESWO_R\G at (D 5) is labeled only once in the design.
Signal GP_F14_AVS_I2S4_RXD_PSE_TRACEDATA_1_R\G at (D 5) is labeled only once in the design.
Signal GP_F16_AVS_I2S4_SCLK_PSE_SWCLK_R\G at (D 5) is labeled only once in the design.
Signal   DMIC_CLK_B1_B at (A 2) is labeled only once in the design.
Signal   DMIC_CLK_B0_B at (A 2) is labeled only once in the design.
Signal   DMIC_CLK_A1_B at (A 2) is labeled only once in the design.
Signal    DMIC_DATA1_C at (A 2) is labeled only once in the design.
Signal PSE_I2S0_SCLK_B at (A 2) is labeled only once in the design.
Signal  PSE_I2S0_RXD_B at (A 2) is labeled only once in the design.
Signal  PSE_I2S0_TXD_B at (A 2) is labeled only once in the design.
Signal PSE_I2S0_SFRM_B at (A 2) is labeled only once in the design.
Signal        HDA_SDI1 at (B 2) is labeled only once in the design.
Signal        HDA_SYNC at (B 2) is labeled only once in the design.
Signal       HDA_RST_N at (B 2) is labeled only once in the design.
Signal   AVS_I2S0_SCLK at (A 2) is labeled only once in the design.
Signal   AVS_I2S0_SFRM at (A 2) is labeled only once in the design.
Signal    AVS_I2S1_RXD at (A 2) is labeled only once in the design.
Signal    AVS_I2S0_RXD at (A 2) is labeled only once in the design.
Signal    AVS_I2S0_TXD at (A 2) is labeled only once in the design.
Signal         HDA_SDO at (B 2) is labeled only once in the design.
Signal        HDA_SDI0 at (B 2) is labeled only once in the design.
Signal        HDA_BCLK at (B 2) is labeled only once in the design.
Signal          GP_R05 at (B 2) is labeled only once in the design.
Signal          GP_R04 at (B 2) is labeled only once in the design.
Signal          GP_R02 at (B 2) is labeled only once in the design.
Signal          GP_R03 at (B 2) is labeled only once in the design.
Signal          GP_R01 at (B 2) is labeled only once in the design.
Signal          GP_R00 at (B 2) is labeled only once in the design.
Signal   PSE_TGPIO14_A at (C 1) is labeled only once in the design.
Signal     PSE_TGPIO49 at (C 1) is labeled only once in the design.
Signal CRF_XTAL_CLKREQ_B at (C 1) is labeled only once in the design.
Signal     PSE_TGPIO50 at (C 1) is labeled only once in the design.
Signal AVS_I2S4_SFRM_B at (D 1) is labeled only once in the design.
Signal  AVS_I2S4_RXD_B at (C 1) is labeled only once in the design.
Signal  AVS_I2S4_TXD_B at (D 1) is labeled only once in the design.
Signal AVS_I2S4_SCLK_B at (C 1) is labeled only once in the design.
Signal PSE_TRACEDATA_1 at (C 1) is labeled only once in the design.
Signal PSE_TRACEDATA_2 at (C 1) is labeled only once in the design.
Signal       PSE_SWCLK at (C 1) is labeled only once in the design.
Signal PSE_TRACEDATA_3 at (C 1) is labeled only once in the design.
Signal  MODEM_CLKREQ_B at (C 1) is labeled only once in the design.
Signal    PSE_TRACECLK at (C 1) is labeled only once in the design.
Signal    PSE_TRACESWO at (C 1) is labeled only once in the design.
Signal       PSE_SWDIO at (C 1) is labeled only once in the design.
Signal          GP_F11 at (D 1) is labeled only once in the design.
Signal          GP_F12 at (D 1) is labeled only once in the design.
Signal          GP_F13 at (D 1) is labeled only once in the design.
Signal          GP_F14 at (D 1) is labeled only once in the design.
Signal          GP_F15 at (D 1) is labeled only once in the design.
Signal          GP_F16 at (D 1) is labeled only once in the design.
Signal          GP_F17 at (D 1) is labeled only once in the design.
Signal          GP_F05 at (D 1) is labeled only once in the design.
Signal GP_R01_HDA_SYNC_AVS_I2S0_SFRM_PSE_I2S0_SFRM at (B 8) is labeled only once in the design.
Signal GP_R05_HDA_SDI1_AVS_I2S1_RXD_DMIC_DATA1 at (B 8) is labeled only once in the design.
Signal GP_R03_HDA_SDI0_AVS_I2S0_RXD_PSE_I2S0_RXD_DMIC_CLK_B1 at (B 8) is labeled only once in the design.
Signal GP_R02_HDA_SDO_AVS_I2S0_TXD_PSE_I2S0_TXD_DMIC_CLK_B0 at (B 8) is labeled only once in the design.
Signal GP_R00_HDA_BCLK_AVS_I2S0_SCLK_PSE_I2S0_SCLK at (B 8) is labeled only once in the design.
Signal GP_F11_PSE_TRACECLK_PSE_TGPIO49\G at (D 6) is labeled only once in the design.
Signal GP_F12_AVS_I2S4_TXD_PSE_TRACESWO at (D 6) is labeled only once in the design.
Signal GP_F14_AVS_I2S4_RXD_PSE_TRACEDATA_1 at (D 6) is labeled only once in the design.
Signal GP_F16_AVS_I2S4_SCLK_PSE_SWCLK at (D 6) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i26@ehl_mcl_lib.ports_13(sch_1):Page1
Signal GP_T09_PSE_HSUART2_EN\G at (A 8) is labeled only once in the design.
Signal GP_T10_PSE_HSUART2_RE\G at (A 8) is labeled only once in the design.
Signal GP_T13_PSE_UART2_TXD_SIO_UART0_TXD\G at (B 8) is labeled only once in the design.
Signal GP_T12_PSE_UART2_RXD_SIO_UART0_RXD\G at (B 8) is labeled only once in the design.
Signal GP_T15_PSE_UART2_CTS_N_SIO_UART0_CTS_N\G at (B 8) is labeled only once in the design.
Signal GP_T14_PSE_UART2_RTS_N_SIO_UART0_RTS_N_PSE_HSUART2_DE\G at (B 8) is labeled only once in the design.
Signal GP_C22_PSE_UART4_RTS_N_ISI_SPIM_MOSI_CNV_MFUART0_RTS_N_SIO_UART2_RTS_N\G at (D 8) is labeled only once in the design.
Signal          GP_T15 at (B 5) is labeled only once in the design.
Signal          GP_T09 at (A 5) is labeled only once in the design.
Signal          GP_T10 at (A 5) is labeled only once in the design.
Signal PSE_UART2_RTS_N at (B 5) is labeled only once in the design.
Signal   PSE_UART2_TXD at (B 5) is labeled only once in the design.
Signal   PSE_UART2_RXD at (B 5) is labeled only once in the design.
Signal SIO_UART0_RTS_N_B at (A 5) is labeled only once in the design.
Signal PSE_UART2_CTS_N at (B 5) is labeled only once in the design.
Signal SIO_UART0_CTS_N_B at (A 5) is labeled only once in the design.
Signal SIO_UART0_RXD_B at (A 5) is labeled only once in the design.
Signal SIO_UART0_TXD_B at (A 5) is labeled only once in the design.
Signal  PSE_HSUART2_DE at (A 5) is labeled only once in the design.
Signal          GP_T14 at (B 5) is labeled only once in the design.
Signal          GP_T12 at (B 5) is labeled only once in the design.
Signal  PSE_HSUART2_EN at (A 5) is labeled only once in the design.
Signal  PSE_HSUART2_RE at (A 5) is labeled only once in the design.
Signal SIO_UART2_CTS_N at (C 5) is labeled only once in the design.
Signal SIO_UART2_RTS_N at (C 5) is labeled only once in the design.
Signal   SIO_UART2_RXD at (C 5) is labeled only once in the design.
Signal   SIO_UART2_TXD at (C 5) is labeled only once in the design.
Signal CNV_MFUART0_RTS_N at (C 5) is labeled only once in the design.
Signal PSE_UART4_RTS_N at (C 5) is labeled only once in the design.
Signal          GP_C22 at (D 5) is labeled only once in the design.
Signal   PSE_UART4_TXD at (D 5) is labeled only once in the design.
Signal   PSE_UART4_RXD at (C 5) is labeled only once in the design.
Signal PSE_UART4_CTS_N at (C 5) is labeled only once in the design.
Signal CNV_MFUART0_TXD at (C 5) is labeled only once in the design.
Signal CNV_MFUART0_RXD at (C 5) is labeled only once in the design.
Signal CNV_MFUART0_CTS_N at (C 5) is labeled only once in the design.
Signal          GP_T13 at (B 5) is labeled only once in the design.
Signal ISI_SPIS_MOSI_A at (C 5) is labeled only once in the design.
Signal ISI_SPIM_MOSI_A at (C 5) is labeled only once in the design.
Signal GP_C21_PSE_UART4_TXD_CNV_MFUART0_TXD_SIO_UART2_TXD\G at (D 8) is labeled only once in the design.
Signal GP_C20_PSE_UART4_RXD_CNV_MFUART0_RXD_SIO_UART2_RXD\G at (D 8) is labeled only once in the design.
Signal GP_C23_PSE_UART4_CTS_N_ISI_SPIS_MOSI_CNV_MFUART0_CTS_N_SIO_UART2_CTS_N\G at (D 8) is labeled only once in the design.
Signal          GP_C23 at (D 5) is labeled only once in the design.
Signal          GP_C20 at (D 5) is labeled only once in the design.
Signal          GP_C21 at (D 5) is labeled only once in the design.
Signal GP_C15_PSE_UART0_CTS_N_SIO_UART1_CTS_N\G at (B 4) is labeled only once in the design.
Signal GP_C11_PSE_HSUART0_RE\G at (A 4) is labeled only once in the design.
Signal GP_C09_PSE_HSUART0_EN\G at (A 4) is labeled only once in the design.
Signal GP_C14_PSE_UART0_RTS_N_PSE_HSUART0_DE_SIO_UART1_RTS_N\G at (B 4) is labeled only once in the design.
Signal GP_H22_PSE_HSUART1_RE_PSE_TGPIO57\G at (C 4) is labeled only once in the design.
Signal GP_H23_PSE_HSUART1_EN_PSE_TGPIO58\G at (C 4) is labeled only once in the design.
Signal GP_C12_PSE_UART0_RXD_SIO_UART1_RXD\G at (B 4) is labeled only once in the design.
Signal GP_C13_PSE_UART0_TXD_SIO_UART1_TXD\G at (B 4) is labeled only once in the design.
Signal          GP_C09 at (A 1) is labeled only once in the design.
Signal          GP_C11 at (A 1) is labeled only once in the design.
Signal          GP_C14 at (B 1) is labeled only once in the design.
Signal          GP_C12 at (B 1) is labeled only once in the design.
Signal          GP_C15 at (B 1) is labeled only once in the design.
Signal PSE_UART0_RTS_N at (B 1) is labeled only once in the design.
Signal PSE_UART0_CTS_N at (B 1) is labeled only once in the design.
Signal   PSE_UART0_RXD at (B 1) is labeled only once in the design.
Signal   PSE_UART0_TXD at (B 1) is labeled only once in the design.
Signal SIO_UART1_CTS_N at (A 1) is labeled only once in the design.
Signal SIO_UART1_RTS_N at (A 1) is labeled only once in the design.
Signal  PSE_HSUART0_DE at (A 1) is labeled only once in the design.
Signal  PSE_HSUART0_EN at (A 1) is labeled only once in the design.
Signal   SIO_UART1_RXD at (A 1) is labeled only once in the design.
Signal   SIO_UART1_TXD at (A 1) is labeled only once in the design.
Signal  PSE_HSUART0_RE at (A 1) is labeled only once in the design.
Signal     PSE_TGPIO58 at (B 1) is labeled only once in the design.
Signal          GP_C13 at (B 1) is labeled only once in the design.
Signal          GP_H23 at (B 1) is labeled only once in the design.
Signal     PSE_TGPIO57 at (B 1) is labeled only once in the design.
Signal     PSE_TGPIO56 at (C 1) is labeled only once in the design.
Signal PSE_UART1_RTS_N at (C 1) is labeled only once in the design.
Signal PSE_UART1_CTS_N at (D 1) is labeled only once in the design.
Signal   PSE_UART1_TXD at (D 1) is labeled only once in the design.
Signal   PSE_UART1_RXD at (D 1) is labeled only once in the design.
Signal  PSE_HSUART1_DE at (C 1) is labeled only once in the design.
Signal  PSE_HSUART1_RE at (C 1) is labeled only once in the design.
Signal  PSE_HSUART1_EN at (C 1) is labeled only once in the design.
Signal     PSE_TGPIO54 at (C 1) is labeled only once in the design.
Signal          GP_H22 at (B 1) is labeled only once in the design.
Signal    M2_SKT2_CFG1 at (C 1) is labeled only once in the design.
Signal    M2_SKT2_CFG3 at (C 1) is labeled only once in the design.
Signal     PSE_TGPIO52 at (C 1) is labeled only once in the design.
Signal     PSE_TGPIO51 at (C 1) is labeled only once in the design.
Signal    M2_SKT2_CFG0 at (C 1) is labeled only once in the design.
Signal GP_H21_PSE_HSUART1_DE_PSE_UART1_RTS_N_PSE_TGPIO56\G at (D 4) is labeled only once in the design.
Signal GP_H15_PSE_UART1_CTS_N_M2_SKT2_CFG3_PSE_TGPIO54\G at (D 4) is labeled only once in the design.
Signal GP_H13_PSE_UART1_TXD_M2_SKT2_CFG1_PSE_TGPIO52\G at (D 4) is labeled only once in the design.
Signal GP_H12_PSE_UART1_RXD_M2_SKT2_CFG0_PSE_TGPIO51\G at (D 4) is labeled only once in the design.
Signal          GP_H21 at (D 1) is labeled only once in the design.
Signal          GP_H12 at (D 1) is labeled only once in the design.
Signal          GP_H13 at (D 1) is labeled only once in the design.
Signal          GP_H15 at (D 1) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i27@ehl_mcl_lib.ports_14(sch_1):Page1
Signal GP_C18_PSE_I2C4_SDA_SML_DATA0_SIO_I2C1_SDA\G at (B 8) is labeled only once in the design.
Signal GP_C19_PSE_I2C4_SCL_SML_CLK0_SIO_I2C1_SCL\G at (B 8) is labeled only once in the design.
Signal GP_D14_PSE_QEPB1_PSE_TGPIO38\G at (C 8) is labeled only once in the design.
Signal GP_D13_PSE_QEPA1_PSE_TGPIO37\G at (C 8) is labeled only once in the design.
Signal GP_D16_PSE_QEPI1_PSE_TGPIO40\G at (C 8) is labeled only once in the design.
Signal GP_H05_SIO_I2C2_SCL_PSE_PWM09_PSE_TGPIO11\G at (A 8) is labeled only once in the design.
Signal GP_H04_SIO_I2C2_SDA_PSE_PWM08_PSE_TGPIO10\G at (A 8) is labeled only once in the design.
Signal   PSE_TGPIO11_B at (A 5) is labeled only once in the design.
Signal   PSE_TGPIO10_B at (A 5) is labeled only once in the design.
Signal    SIO_I2C2_SDA at (A 5) is labeled only once in the design.
Signal    SIO_I2C2_SCL at (A 5) is labeled only once in the design.
Signal     PSE_PWM08_B at (A 5) is labeled only once in the design.
Signal     PSE_PWM09_B at (A 5) is labeled only once in the design.
Signal          GP_H04 at (A 5) is labeled only once in the design.
Signal    SIO_I2C1_SDA at (A 5) is labeled only once in the design.
Signal          GP_H05 at (A 5) is labeled only once in the design.
Signal    SIO_I2C1_SCL at (B 5) is labeled only once in the design.
Signal        SML_CLK0 at (B 5) is labeled only once in the design.
Signal    PSE_I2C4_SDA at (B 5) is labeled only once in the design.
Signal       SML_DATA0 at (B 5) is labeled only once in the design.
Signal    PSE_I2C4_SCL at (B 5) is labeled only once in the design.
Signal          GP_C18 at (B 5) is labeled only once in the design.
Signal          GP_C19 at (B 5) is labeled only once in the design.
Signal       PSE_QEPI1 at (C 5) is labeled only once in the design.
Signal       PSE_QEPA1 at (C 5) is labeled only once in the design.
Signal       PSE_QEPB1 at (C 5) is labeled only once in the design.
Signal     PSE_TGPIO38 at (B 5) is labeled only once in the design.
Signal     PSE_TGPIO40 at (B 5) is labeled only once in the design.
Signal     PSE_TGPIO37 at (B 5) is labeled only once in the design.
Signal          GP_D14 at (C 5) is labeled only once in the design.
Signal          GP_D13 at (C 5) is labeled only once in the design.
Signal          GP_D16 at (C 5) is labeled only once in the design.
Signal PSE_SPI1_MOSI_A at (C 5) is labeled only once in the design.
Signal   PSE_TGPIO12_A at (C 5) is labeled only once in the design.
Signal   PSE_TGPIO11_A at (D 5) is labeled only once in the design.
Signal   PSE_TGPIO10_A at (D 5) is labeled only once in the design.
Signal GP_U07_PSE_QEPA3_PSE_SPI1_MOSI_PSE_TGPIO10\G at (D 8) is labeled only once in the design.
Signal GP_U11_PSE_QEPB3_PSE_TGPIO11\G at (D 8) is labeled only once in the design.
Signal GP_U19_PSE_QEPI3_PSE_TGPIO12\G at (D 8) is labeled only once in the design.
Signal          GP_U11 at (D 5) is labeled only once in the design.
Signal          GP_U07 at (D 5) is labeled only once in the design.
Signal       PSE_QEPI3 at (D 5) is labeled only once in the design.
Signal       PSE_QEPB3 at (D 5) is labeled only once in the design.
Signal          GP_U19 at (D 5) is labeled only once in the design.
Signal       PSE_QEPA3 at (D 5) is labeled only once in the design.
Signal GP_B08_PSE_I2C1_SDA_PSE_TGPIO09\G at (B 4) is labeled only once in the design.
Signal GP_H06_SIO_I2C3_SDA_PSE_I2C5_SDA_PSE_PWM10\G at (A 4) is labeled only once in the design.
Signal GP_T02_PSE_QEPI2_SIO_I2C7_SDA_PSE_TGPIO07\G at (C 4) is labeled only once in the design.
Signal GP_T03_SIO_I2C7_SCL_PSE_TGPIO06\G at (C 4) is labeled only once in the design.
Signal GP_B06_PSE_I2C0_SDA_PSE_TGPIO07\G at (B 4) is labeled only once in the design.
Signal GP_B07_PSE_I2C1_SCL_PSE_TGPIO08\G at (B 4) is labeled only once in the design.
Signal GP_B05_PSE_I2C0_SCL_PSE_TGPIO06\G at (B 4) is labeled only once in the design.
Signal GP_H07_SIO_I2C3_SCL_PSE_I2C5_SCL_PSE_PWM11\G at (A 4) is labeled only once in the design.
Signal          GP_B07 at (B 1) is labeled only once in the design.
Signal          GP_B08 at (B 1) is labeled only once in the design.
Signal    SIO_I2C3_SCL at (A 1) is labeled only once in the design.
Signal   PSE_TGPIO08_B at (A 1) is labeled only once in the design.
Signal   PSE_TGPIO09_B at (A 1) is labeled only once in the design.
Signal          GP_H07 at (A 1) is labeled only once in the design.
Signal          GP_H06 at (A 1) is labeled only once in the design.
Signal    SIO_I2C3_SDA at (A 1) is labeled only once in the design.
Signal    PSE_I2C5_SCL at (A 1) is labeled only once in the design.
Signal    PSE_I2C5_SDA at (A 1) is labeled only once in the design.
Signal    PSE_I2C1_SCL at (B 1) is labeled only once in the design.
Signal    PSE_I2C1_SDA at (B 1) is labeled only once in the design.
Signal     PSE_PWM11_B at (A 1) is labeled only once in the design.
Signal     PSE_PWM10_B at (A 1) is labeled only once in the design.
Signal   PSE_TGPIO06_B at (B 1) is labeled only once in the design.
Signal   PSE_TGPIO07_A at (C 1) is labeled only once in the design.
Signal   PSE_TGPIO07_B at (B 1) is labeled only once in the design.
Signal   PSE_TGPIO06_A at (C 1) is labeled only once in the design.
Signal          GP_B05 at (B 1) is labeled only once in the design.
Signal          GP_B06 at (B 1) is labeled only once in the design.
Signal   PSE_TGPIO09_A at (D 1) is labeled only once in the design.
Signal       PSE_QEPI2 at (C 1) is labeled only once in the design.
Signal   PSE_TGPIO08_A at (D 1) is labeled only once in the design.
Signal       PSE_QEPA2 at (C 1) is labeled only once in the design.
Signal       PSE_QEPB2 at (C 1) is labeled only once in the design.
Signal    SIO_I2C7_SCL at (C 1) is labeled only once in the design.
Signal    SIO_I2C7_SDA at (C 1) is labeled only once in the design.
Signal    PSE_I2C0_SCL at (B 1) is labeled only once in the design.
Signal    PSE_I2C0_SDA at (B 1) is labeled only once in the design.
Signal          GP_T03 at (C 1) is labeled only once in the design.
Signal          GP_T02 at (C 1) is labeled only once in the design.
Signal GP_T01_PSE_QEPB2_SIO_I2C6_SCL_PSE_TGPIO09\G at (D 4) is labeled only once in the design.
Signal GP_T00_PSE_QEPA2_SIO_I2C6_SDA_PSE_TGPIO08\G at (D 4) is labeled only once in the design.
Signal    SIO_I2C6_SCL at (D 1) is labeled only once in the design.
Signal          GP_T00 at (D 1) is labeled only once in the design.
Signal          GP_T01 at (D 1) is labeled only once in the design.
Signal    SIO_I2C6_SDA at (D 1) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i28@ehl_mcl_lib.ports_15(sch_1):Page1
Signal GP_A04_PSE_GBE0_RGM0_TXCLK at (A 8) is labeled only once in the design.
Signal GP_A05_PSE_GBE0_RGM0_TXCTL at (A 8) is labeled only once in the design.
Signal GP_A03_PSE_GBE0_RGM0_TXD0 at (A 8) is labeled only once in the design.
Signal GP_A02_PSE_GBE0_RGM0_TXD1 at (A 8) is labeled only once in the design.
Signal GP_A00_PSE_GBE0_RGM0_TXD3 at (A 8) is labeled only once in the design.
Signal GP_A01_PSE_GBE0_RGM0_TXD2 at (A 8) is labeled only once in the design.
Signal GP_U04_ISI_SPIM_CS_PSE_SPI1_CS0_N\G at (A 8) is labeled only once in the design.
Signal GP_A02_PSE_GBE0_RGM0_TXD1_R\G at (A 6) is labeled only once in the design.
Signal GP_A01_PSE_GBE0_RGM0_TXD2_R\G at (A 6) is labeled only once in the design.
Signal GP_U08_ISI_SPIS_CS_PSE_TGPIO10\G at (B 8) is labeled only once in the design.
Signal GP_U05_ISI_SPIM_SCLK_PSE_SPI1_CLK\G at (A 8) is labeled only once in the design.
Signal GP_U06_ISI_SPIM_MISO_PSE_SPI1_MISO\G at (A 8) is labeled only once in the design.
Signal GP_U10_ISI_SPIS_MISO_ISI_I2CS_SDA_PSE_TGPIO12\G at (B 8) is labeled only once in the design.
Signal GP_A05_PSE_GBE0_RGM0_TXCTL_R\G at (A 6) is labeled only once in the design.
Signal GP_A00_PSE_GBE0_RGM0_TXD3_R\G at (A 6) is labeled only once in the design.
Signal GP_A03_PSE_GBE0_RGM0_TXD0_R\G at (A 6) is labeled only once in the design.
Signal GP_A04_PSE_GBE0_RGM0_TXCLK_R\G at (A 6) is labeled only once in the design.
Signal GP_U09_ISI_SPIS_SCLK_ISI_I2CS_SCL_PSE_TGPIO11\G at (B 8) is labeled only once in the design.
Signal GP_C01_SMB_DATA_PSE_I2C3_SDA_PSE_TGPIO19\G at (C 8) is labeled only once in the design.
Signal GP_C00_SMB_CLK_PSE_I2C3_SCL_PSE_TGPIO18\G at (C 8) is labeled only once in the design.
Signal   PSE_TGPIO11_C at (B 5) is labeled only once in the design.
Signal    ISI_I2CS_SDA at (B 5) is labeled only once in the design.
Signal   ISI_SPIM_SCLK at (A 5) is labeled only once in the design.
Signal   ISI_SPIM_MISO at (A 5) is labeled only once in the design.
Signal  PSE_SPI1_CLK_A at (A 5) is labeled only once in the design.
Signal PSE_SPI1_MISO_A at (A 5) is labeled only once in the design.
Signal PSE_SPI1_CS0_N_A at (A 5) is labeled only once in the design.
Signal    ISI_I2CS_SCL at (B 5) is labeled only once in the design.
Signal   PSE_TGPIO12_B at (B 5) is labeled only once in the design.
Signal   PSE_TGPIO10_C at (B 5) is labeled only once in the design.
Signal          GP_U05 at (A 5) is labeled only once in the design.
Signal          GP_U06 at (A 5) is labeled only once in the design.
Signal          GP_U04 at (A 5) is labeled only once in the design.
Signal ISI_SPIM_CS_PSE at (A 5) is labeled only once in the design.
Signal   ISI_SPIS_SCLK at (B 5) is labeled only once in the design.
Signal   ISI_SPIS_MISO at (B 5) is labeled only once in the design.
Signal     ISI_SPIS_CS at (B 5) is labeled only once in the design.
Signal    PSE_I2C3_SCL at (C 5) is labeled only once in the design.
Signal        SMB_DATA at (C 5) is labeled only once in the design.
Signal     PSE_TGPIO41 at (C 5) is labeled only once in the design.
Signal     PSE_TGPIO42 at (C 5) is labeled only once in the design.
Signal    PSE_I2C3_SDA at (C 5) is labeled only once in the design.
Signal          GP_C00 at (C 5) is labeled only once in the design.
Signal          GP_U09 at (B 5) is labeled only once in the design.
Signal          GP_U10 at (B 5) is labeled only once in the design.
Signal   PSE_TGPIO18_B at (C 5) is labeled only once in the design.
Signal   PSE_TGPIO19_B at (C 5) is labeled only once in the design.
Signal          GP_U08 at (B 5) is labeled only once in the design.
Signal ISI_SPIS_MOSI_B at (D 5) is labeled only once in the design.
Signal         SMB_CLK at (C 5) is labeled only once in the design.
Signal          GP_C01 at (C 5) is labeled only once in the design.
Signal GP_D17_PSE_PWM04_ISI_SPIM_MOSI_PSE_TGPIO41\G at (D 8) is labeled only once in the design.
Signal GP_D18_PSE_PWM05_ISI_SPIS_MOSI_PSE_TGPIO42\G at (D 8) is labeled only once in the design.
Signal       PSE_PWM04 at (D 5) is labeled only once in the design.
Signal          GP_D17 at (D 5) is labeled only once in the design.
Signal          GP_D18 at (D 5) is labeled only once in the design.
Signal       PSE_PWM05 at (D 5) is labeled only once in the design.
Signal ISI_SPIM_MOSI_B at (D 5) is labeled only once in the design.
Signal          GP_A05 at (A 4) is labeled only once in the design.
Signal          GP_A03 at (A 4) is labeled only once in the design.
Signal          GP_A01 at (A 4) is labeled only once in the design.
Signal PSE_GBE0_RGM0_TXCTL at (A 4) is labeled only once in the design.
Signal PSE_GBE0_RGM0_TXCLK at (A 4) is labeled only once in the design.
Signal PSE_GBE0_RGM0_TXD0 at (A 4) is labeled only once in the design.
Signal PSE_GBE0_RGM0_TXD1 at (A 4) is labeled only once in the design.
Signal PSE_GBE0_RGM0_TXD3 at (A 4) is labeled only once in the design.
Signal          GP_A02 at (A 4) is labeled only once in the design.
Signal          GP_A00 at (A 4) is labeled only once in the design.
Signal          GP_A04 at (A 4) is labeled only once in the design.
Signal PSE_GBE0_RGM0_TXD2 at (A 4) is labeled only once in the design.
Signal GP_A10_PSE_GBE0_RGM0_RXD0\G at (A 4) is labeled only once in the design.
Signal GP_A08_PSE_GBE0_RGM0_RXD2\G at (A 4) is labeled only once in the design.
Signal GP_A07_PSE_GBE0_RGM0_RXD3\G at (A 4) is labeled only once in the design.
Signal GP_A09_PSE_GBE0_RGM0_RXD1\G at (A 4) is labeled only once in the design.
Signal GP_T07_PSE_GBE0_RGM0_PPS_PSE_TGPIO59\G at (C 4) is labeled only once in the design.
Signal GP_C04_PSE_GBE0_RGM0_MDIO_PSE_UART3_RTS_N_PSE_HSUART3_DE\G at (C 4) is labeled only once in the design.
Signal GP_C03_PSE_GBE0_RGM0_MDC_PSE_HSUART3_EN\G at (C 4) is labeled only once in the design.
Signal GP_T06_PSE_GBE0_RGM0_AUXTS_USB2_OC1_N\G at (B 4) is labeled only once in the design.
Signal GP_T04_PSE_GBE0_RGM0_INT\G at (C 4) is labeled only once in the design.
Signal GP_A06_PSE_GBE0_RGM0_RXCLK\G at (A 4) is labeled only once in the design.
Signal GP_A23_PSE_GBE0_RGM0_RXCTL\G at (A 4) is labeled only once in the design.
Signal GP_T05_PSE_GBE0_RGM0_RST_N\G at (C 4) is labeled only once in the design.
Signal          GP_A07 at (A 1) is labeled only once in the design.
Signal          GP_A08 at (A 1) is labeled only once in the design.
Signal          GP_A10 at (A 1) is labeled only once in the design.
Signal          GP_A09 at (A 1) is labeled only once in the design.
Signal          GP_A23 at (A 1) is labeled only once in the design.
Signal      USB2_OC1_N at (B 1) is labeled only once in the design.
Signal     PSE_TGPIO59 at (B 1) is labeled only once in the design.
Signal PSE_GBE0_RGM0_RXCLK at (A 1) is labeled only once in the design.
Signal PSE_GBE0_RGM0_RXCTL at (A 1) is labeled only once in the design.
Signal PSE_GBE0_RGM0_RXD0 at (A 1) is labeled only once in the design.
Signal PSE_GBE0_RGM0_RXD1 at (A 1) is labeled only once in the design.
Signal PSE_GBE0_RGM0_RXD2 at (A 1) is labeled only once in the design.
Signal PSE_GBE0_RGM0_RXD3 at (A 1) is labeled only once in the design.
Signal          GP_A06 at (A 1) is labeled only once in the design.
Signal  PSE_HSUART3_DE at (B 1) is labeled only once in the design.
Signal  PSE_HSUART3_EN at (B 1) is labeled only once in the design.
Signal       PSE_PWM02 at (D 1) is labeled only once in the design.
Signal       PSE_PWM06 at (D 1) is labeled only once in the design.
Signal PSE_UART3_RTS_N at (B 1) is labeled only once in the design.
Signal PSE_GBE0_RGM0_INT at (B 1) is labeled only once in the design.
Signal PSE_GBE0_RGM0_MDC at (B 1) is labeled only once in the design.
Signal PSE_GBE0_RGM0_RST_N at (B 1) is labeled only once in the design.
Signal PSE_GBE0_RGM0_PPS at (B 1) is labeled only once in the design.
Signal PSE_GBE0_RGM0_AUXTS at (B 1) is labeled only once in the design.
Signal PSE_GBE0_RGM0_MDIO at (B 1) is labeled only once in the design.
Signal     PSE_TGPIO32 at (C 1) is labeled only once in the design.
Signal     PSE_TGPIO34 at (C 1) is labeled only once in the design.
Signal          GP_T06 at (B 1) is labeled only once in the design.
Signal          GP_T07 at (C 1) is labeled only once in the design.
Signal          GP_C04 at (C 1) is labeled only once in the design.
Signal          GP_C03 at (C 1) is labeled only once in the design.
Signal          GP_T05 at (C 1) is labeled only once in the design.
Signal     PSE_TGPIO36 at (C 1) is labeled only once in the design.
Signal     PSE_TGPIO35 at (C 1) is labeled only once in the design.
Signal     PSE_TGPIO33 at (C 1) is labeled only once in the design.
Signal  PSE_SPI1_CS1_N at (C 1) is labeled only once in the design.
Signal PSE_SPI1_MISO_B at (C 1) is labeled only once in the design.
Signal PSE_SPI1_CS0_N_B at (C 1) is labeled only once in the design.
Signal  PSE_SPI1_CLK_B at (C 1) is labeled only once in the design.
Signal PSE_SPI1_MOSI_B at (C 1) is labeled only once in the design.
Signal          GP_T04 at (C 1) is labeled only once in the design.
Signal GP_D04_PSE_PWM02_PSE_SPI1_CS1_N_PSE_TGPIO36\G at (D 4) is labeled only once in the design.
Signal GP_D00_PSE_QEPA0_PSE_SPI1_CS0_N_PSE_TGPIO32\G at (D 4) is labeled only once in the design.
Signal GP_D02_PSE_QEPI0_PSE_SPI1_MISO_PSE_TGPIO34\G at (D 4) is labeled only once in the design.
Signal GP_D03_PSE_PWM06_PSE_SPI1_MOSI_PSE_TGPIO35\G at (D 4) is labeled only once in the design.
Signal GP_D01_PSE_QEPB0_PSE_SPI1_CLK_PSE_TGPIO33\G at (D 4) is labeled only once in the design.
Signal          GP_D00 at (D 1) is labeled only once in the design.
Signal          GP_D02 at (D 1) is labeled only once in the design.
Signal          GP_D03 at (D 1) is labeled only once in the design.
Signal          GP_D01 at (D 1) is labeled only once in the design.
Signal          GP_D04 at (D 1) is labeled only once in the design.
Signal       PSE_QEPB0 at (D 1) is labeled only once in the design.
Signal       PSE_QEPI0 at (D 1) is labeled only once in the design.
Signal       PSE_QEPA0 at (D 1) is labeled only once in the design.

Warnings in Page : @ehl_mcl_lib.ehl_mcl(sch_1):page187_i29@ehl_mcl_lib.ports_16(sch_1):Page1
Signal GP_A19_PSE_GBE1_RGM1_RXD3_AVS_I2S5_SCLK at (B 8) is labeled only once in the design.
Signal GP_A22_PSE_GBE1_RGM1_RXD0_AVS_I2S5_RXD at (B 8) is labeled only once in the design.
Signal GP_A21_PSE_GBE1_RGM1_RXD1_AVS_I2S5_TXD at (B 8) is labeled only once in the design.
Signal GP_A20_PSE_GBE1_RGM1_RXD2_AVS_I2S5_SFRM at (B 8) is labeled only once in the design.
Signal GP_A11_PSE_GBE1_RGM1_TXD3 at (B 8) is labeled only once in the design.
Signal GP_A13_PSE_GBE1_RGM1_TXD1 at (C 8) is labeled only once in the design.
Signal GP_A16_PSE_GBE1_RGM1_TXCTL at (C 8) is labeled only once in the design.
Signal GP_A12_PSE_GBE1_RGM1_TXD2 at (B 8) is labeled only once in the design.
Signal GP_A14_PSE_GBE1_RGM1_TXD0 at (C 8) is labeled only once in the design.
Signal GP_A15_PSE_GBE1_RGM1_TXCLK at (C 8) is labeled only once in the design.
Signal GP_A17_PSE_GBE1_RGM1_RXCLK\G at (B 8) is labeled only once in the design.
Signal GP_A18_PSE_GBE1_RGM1_RXCTL\G at (B 8) is labeled only once in the design.
Signal GP_A22_PSE_GBE1_RGM1_RXD0_AVS_I2S5_RXD_R\G at (B 5) is labeled only once in the design.
Signal GP_A20_PSE_GBE1_RGM1_RXD2_AVS_I2S5_SFRM_R\G at (B 5) is labeled only once in the design.
Signal GP_A14_PSE_GBE1_RGM1_TXD0_R\G at (C 7) is labeled only once in the design.
Signal GP_A16_PSE_GBE1_RGM1_TXCTL_R\G at (C 7) is labeled only once in the design.
Signal GP_A13_PSE_GBE1_RGM1_TXD1_R\G at (C 7) is labeled only once in the design.
Signal GP_A15_PSE_GBE1_RGM1_TXCLK_R\G at (C 7) is labeled only once in the design.
Signal GP_A12_PSE_GBE1_RGM1_TXD2_R\G at (B 7) is labeled only once in the design.
Signal GP_A11_PSE_GBE1_RGM1_TXD3_R\G at (B 7) is labeled only once in the design.
Signal GP_A19_PSE_GBE1_RGM1_RXD3_AVS_I2S5_SCLK_R\G at (B 5) is labeled only once in the design.
Signal GP_A21_PSE_GBE1_RGM1_RXD1_AVS_I2S5_TXD_R\G at (B 5) is labeled only once in the design.
Signal PSE_GBE1_RGM1_MDIO at (D 5) is labeled only once in the design.
Signal   PSE_UART5_RXD at (C 5) is labeled only once in the design.
Signal PSE_UART5_CTS_N at (C 5) is labeled only once in the design.
Signal   PSE_UART5_TXD at (C 5) is labeled only once in the design.
Signal     PSE_TGPIO21 at (C 5) is labeled only once in the design.
Signal PSE_UART5_RTS_N at (C 5) is labeled only once in the design.
Signal  PSE_HSUART3_RE at (C 5) is labeled only once in the design.
Signal PSE_GBE1_RGM1_AUXTS at (D 5) is labeled only once in the design.
Signal PSE_GBE1_RGM1_PPS at (D 5) is labeled only once in the design.
Signal GP_C06_PSE_GBE1_RGM1_MDC\G at (D 8) is labeled only once in the design.
Signal GP_H00_PSE_GBE1_RGM1_INT_PSE_UART5_RXD\G at (D 8) is labeled only once in the design.
Signal GP_H01_PSE_GBE1_RGM1_RST_N_PSE_UART5_TXD\G at (D 8) is labeled only once in the design.
Signal PSE_GBE1_RGM1_MDC at (D 5) is labeled only once in the design.
Signal PSE_GBE1_RGM1_RST_N at (D 5) is labeled only once in the design.
Signal PSE_GBE1_RGM1_INT at (D 5) is labeled only once in the design.
Signal          GP_H03 at (D 5) is labeled only once in the design.
Signal          GP_H02 at (D 5) is labeled only once in the design.
Signal          GP_H01 at (D 5) is labeled only once in the design.
Signal          GP_H00 at (D 5) is labeled only once in the design.
Signal          GP_C06 at (D 5) is labeled only once in the design.
Signal          GP_C07 at (D 5) is labeled only once in the design.
Signal PSE_GBE1_RGM1_RXCLK at (A 4) is labeled only once in the design.
Signal PSE_GBE1_RGM1_RXCTL at (A 4) is labeled only once in the design.
Signal PSE_GBE1_RGM1_RXD0 at (A 4) is labeled only once in the design.
Signal PSE_GBE1_RGM1_RXD1 at (A 4) is labeled only once in the design.
Signal PSE_GBE1_RGM1_RXD2 at (A 4) is labeled only once in the design.
Signal    AVS_I2S5_RXD at (A 4) is labeled only once in the design.
Signal    AVS_I2S5_TXD at (A 4) is labeled only once in the design.
Signal   AVS_I2S5_SFRM at (A 4) is labeled only once in the design.
Signal   AVS_I2S5_SCLK at (A 4) is labeled only once in the design.
Signal PSE_GBE1_RGM1_TXD2 at (B 4) is labeled only once in the design.
Signal PSE_GBE1_RGM1_TXCLK at (B 4) is labeled only once in the design.
Signal PSE_GBE1_RGM1_TXCTL at (B 4) is labeled only once in the design.
Signal PSE_GBE1_RGM1_TXD0 at (B 4) is labeled only once in the design.
Signal PSE_GBE1_RGM1_TXD1 at (B 4) is labeled only once in the design.
Signal          GP_A12 at (B 4) is labeled only once in the design.
Signal          GP_A13 at (C 4) is labeled only once in the design.
Signal          GP_A16 at (C 4) is labeled only once in the design.
Signal          GP_A15 at (C 4) is labeled only once in the design.
Signal          GP_A14 at (C 4) is labeled only once in the design.
Signal          GP_A11 at (B 4) is labeled only once in the design.
Signal PSE_GBE1_RGM1_RXD3 at (A 4) is labeled only once in the design.
Signal          GP_A17 at (B 4) is labeled only once in the design.
Signal PSE_GBE1_RGM1_TXD3 at (B 4) is labeled only once in the design.
Signal          GP_A22 at (B 4) is labeled only once in the design.
Signal          GP_A18 at (B 4) is labeled only once in the design.
Signal          GP_A21 at (B 4) is labeled only once in the design.
Signal          GP_A20 at (B 4) is labeled only once in the design.
Signal          GP_A19 at (B 4) is labeled only once in the design.
Signal GP_U03_GBE_RGM2_AUXTS_PSE_I2C7_SDA\G at (D 4) is labeled only once in the design.
Signal GP_U02_GBE_RGM2_PPS_PSE_I2C7_SCL\G at (D 4) is labeled only once in the design.
Signal GP_C05_PSE_PWM01_PSE_UART3_CTS_N_SML_ALERT0_N_PSE_TGPIO30\G at (B 4) is labeled only once in the design.
Signal GP_C08_PSE_TGPIO04_DNX_FORCE_RELOAD\G at (A 4) is labeled only once in the design.
Signal GP_H14_M2_SKT2_CFG2_PSE_TGPIO53\G at (A 4) is labeled only once in the design.
Signal GP_C10_PSE_TGPIO05\G at (B 4) is labeled only once in the design.
Signal    SML_ALERT0_N at (B 1) is labeled only once in the design.
Signal     PSE_TGPIO30 at (B 1) is labeled only once in the design.
Signal          GP_C08 at (A 1) is labeled only once in the design.
Signal          GP_C10 at (B 1) is labeled only once in the design.
Signal    M2_SKT2_CFG2 at (A 1) is labeled only once in the design.
Signal          GP_H14 at (A 1) is labeled only once in the design.
Signal     PSE_TGPIO53 at (A 1) is labeled only once in the design.
Signal     PSE_TGPIO05 at (A 1) is labeled only once in the design.
Signal     PSE_TGPIO04 at (A 1) is labeled only once in the design.
Signal DNX_FORCE_RELOAD at (A 1) is labeled only once in the design.
Signal   PSE_UART3_RXD at (C 1) is labeled only once in the design.
Signal    PSE_I2C7_SCL at (C 1) is labeled only once in the design.
Signal    PSE_I2C7_SDA at (C 1) is labeled only once in the design.
Signal    GI_UART3_TXD at (C 1) is labeled only once in the design.
Signal    SIO_I2C0_SDA at (C 1) is labeled only once in the design.
Signal    PSE_I2C6_SDA at (C 1) is labeled only once in the design.
Signal    PSE_I2C6_SCL at (C 1) is labeled only once in the design.
Signal  GBE_RGM2_AUXTS at (C 1) is labeled only once in the design.
Signal    GBE_RGM2_INT at (C 1) is labeled only once in the design.
Signal    GBE_RGM2_PPS at (C 1) is labeled only once in the design.
Signal   GBE_RGM2_MDIO at (C 1) is labeled only once in the design.
Signal    GBE_RGM2_MDC at (C 1) is labeled only once in the design.
Signal  GBE_RGM2_RST_N at (C 1) is labeled only once in the design.
Signal          GP_U03 at (D 1) is labeled only once in the design.
Signal          GP_U02 at (D 1) is labeled only once in the design.
Signal    SIO_I2C0_SCL at (C 1) is labeled only once in the design.
Signal          GP_C05 at (B 1) is labeled only once in the design.
Signal       PSE_PWM01 at (B 1) is labeled only once in the design.
Signal PSE_UART3_CTS_N at (B 1) is labeled only once in the design.
Signal GP_C16_GBE_RGM2_MDIO_PSE_UART3_RXD_SIO_I2C0_SDA\G at (D 4) is labeled only once in the design.
Signal GP_C17_GBE_RGM2_MDC_GI_UART3_TXD_SIO_I2C0_SCL\G at (D 4) is labeled only once in the design.
Signal GP_U01_GBE_RGM2_RST_N_PSE_I2C6_SDA\G at (D 4) is labeled only once in the design.
Signal GP_U00_GBE_RGM2_INT_PSE_I2C6_SCL\G at (D 4) is labeled only once in the design.
Signal          GP_C16 at (D 1) is labeled only once in the design.
Signal          GP_C17 at (D 1) is labeled only once in the design.
Signal          GP_U00 at (D 1) is labeled only once in the design.
Signal          GP_U01 at (D 1) is labeled only once in the design.
Signal GP_C07_PSE_GBE1_RGM1_MDIO_PSE_HSUART3_RE\G at (D 8) is labeled only once in the design.
Signal GP_H03_PSE_GBE1_RGM1_PPS_PSE_UART5_CTS_N_PSE_TGPIO21\G at (D 8) is labeled only once in the design.
Signal GP_H02_PSE_GBE1_RGM1_AUXTS_PSE_UART5_RTS_N\G at (D 8) is labeled only once in the design.
