2000 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.

IEEE Transactions on Microwave Theory and Techniques
Volume 48 Number 1, January 2000

Improvement of the Quality Factor of RF Integrated Inductors by Layout Optimization

Page 76.

Abstract:

A systematic method to improve the quality (Q ) factor of RF integrated inductors is presented in this paper. The proposed method is based on the layout optimization to minimize the series resistance of the inductor coil, taking into account both ohmic losses, due to conduction currents, and magnetically induced losses, due to Eddy currents. The technique is particularly useful when applied to inductors in which the fabrication process includes integration substrate removal. However, it is also applicable to inductors on low-loss substrates. The method optimizes the width of the metal strip for each turn of the inductor coil, leading to a variable strip-width layout. The optimization procedure has been successfully applied to the design of square spiral inductors in a silicon-based multichip-module technology, complemented with silicon micromachining postprocessing. The obtained experimental results corroborate the validity of the proposed method. A Q factor of about 17 have been obtained for a 35-nH inductor at 1.5 GHz, with Q values higher than 40 predicted for a 20-nH inductor working at 3.5 GHz. The latter is up to a 60% better than the best results for a single strip-width inductor working at the same frequency.

References

1. R. M. Warner, and J. N. Fordemwalt, Eds., Integrated Circuits Design. Principles and Fabrication, New York : McGraw-Hill, 1965, p. 267.
2. N. M. Nguyen and R. G. Meyer, "Si IC compatible inductors and LC passive filters", IEEE J. Solid-State Circuits, vol. 25, pp.  1028- 1031,  Aug.  1990.
3. J. Y. C. Chang, A. A. Abidi and M. Gaitan, "Large suspended inductors on silicon and their use in a 2-µ m CMOS RF amplifier ", IEEE Electron Device Lett., vol. 14, pp.  246 - 248, May  1993.
4. C. Y. Chi and G. M. Rebeiz, "Planar microwave and millimeter wave lumped element and coupled line filters using micromachining techniques", IEEE Trans. Microwave Theory Tech., vol. 43, pp.  730- 738, Apr.  1995 .
5. A. Rofougaran, J. Y. C. Chang, M. Rofougaran and A. A. Abidi, "A 1 GHz CMOS RF front-end IC for a direct conversion wireless receiver", IEEE J. Solid-State Circuits, vol. 31, pp.  880- 889, July  1996.
6. J. M. López-Villegas, J. Samitier, J. Bausells, A. Merlos, C. Cané and R. Knöche, "Study of integrated RF passive components performed using CMOS and Si micromachining technologies", J. Micromech. Microeng., vol. 7, pp.  162- 164, 1997.
7. T. M. Weller, L. P. B. Katehi and G. M. Rebeiz, "High performance microshield line components", IEEE Trans. Microwave Theory Tech., vol. 43, pp.  534- 543, 1995.
8. R. F. Drayton and L. P. B. Katehi, "Development of self-packaged high frequency circuits using micromachining techniques", IEEE Trans. Microwave Theory Tech., vol. 43, pp.  2073- 2080 , 1995.
9. J. Craninckx and S. J. Steyaert, "A 1.8-GHz low- phase-noise CMOS VCO using optimized hollow spiral inductors", IEEE J. Solid-State Circuits, vol. 32, pp.  736- 744, May  1997.