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IEEE Transactions on Microwave Theory and Techniques
Volume 48 Number 2, February 2000

Table of Contents for this issue

Complete paper in PDF format

A PEEC with a New Capacitance Model for Circuit Simulation of Interconnects and Packaging Structures

Yi Cao, Zheng-Fan Li, Ji-Feng Mao and Jun-Fa Mao Senior Member, IEEE

Page 281.

Abstract:

In this paper, a modified partial-element equivalent-circuit (PEEC) model, i.e., (Lp, vector A, R, f) PEEC, is introduced. In such a model, no equivalent circuit, but a set of state equations for the variables representing the function of circuit, are given to model a three-dimensional structure. Unlike the original (Lp, P, R, f)PEEC model, the definition of vector potential vector A with integral form and the Lorentz gauge are used in expanding the basic integral equation instead of the definition of the scalar potential with integral form. This can directly lead to the state equations, and the capacitance extraction can be replaced by the calculation of the divergence of vector A, which is analytical. For analysis of most interconnect and packaging problems, generally containing complex dielectric structures, the new model can save a large part of computing time. The validity of the new model is verified by the analysis in time and frequency domain with several examples of typical interconnect and packaging structures, and the results with this new method agree well with those of other papers.

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